/src/tools/compat/ |
lchflags.c | 45 struct stat psb; local in function:lchflags 47 if (lstat(path, &psb) == -1) 49 if (S_ISLNK(psb.st_mode)) {
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lchmod.c | 45 struct stat psb; local in function:lchmod 47 if (lstat(path, &psb) == -1) 49 if (S_ISLNK(psb.st_mode)) {
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lchown.c | 45 struct stat psb; local in function:lchown 47 if (lstat(path, &psb) == -1) 49 if (S_ISLNK(psb.st_mode)) {
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/src/sys/dev/pci/ |
yds.c | 1348 struct play_slot_ctrl_bank *psb; local in function:yds_trigger_output 1405 psb = sc->pbankp[0]; 1406 memset(psb, 0, sizeof(*psb)); 1407 psb->format = htole32(format); 1408 psb->pgbase = htole32(s); 1409 psb->pgloopend = htole32(l); 1411 psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12); 1412 psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate)); 1413 psb->eggainend = htole32(gain) [all...] |
/src/sys/arch/x86/x86/ |
powernow.c | 449 struct powernow_psb_s *psb; local in function:powernow_k7_states 468 psb = (struct powernow_psb_s *)p; 470 if (psb->version != PN7_PSB_VERSION) 473 cstate->sgtc = psb->ttime * cstate->fsb; 478 if (psb->flags & 1) 483 for (maxpst = 0; maxpst < psb->n_pst; maxpst++) { 723 struct powernow_psb_s *psb; local in function:powernow_k8_states 742 psb = (struct powernow_psb_s *)p; 744 if (psb->version != 0x14) { 745 DPRINTF(("%s: psb->version != 0x14\n", __func__)) [all...] |
/src/bin/pax/ |
tables.c | 1132 * name is name of the directory, psb the stat buffer with the data in it, 1143 add_dir(char *name, int nlen, struct stat *psb, int frc_mode) 1181 dblk.mode = psb->st_mode & 0xffff; 1182 dblk.mtime = psb->st_mtime; 1183 dblk.atime = psb->st_atime; 1185 dblk.fflags = psb->st_flags; 1210 dblk->mode = psb->st_mode & 0xffff; 1211 dblk->mtime = psb->st_mtime; 1212 dblk->atime = psb->st_atime; 1214 dblk->fflags = psb->st_flags [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
amdgpu_vega10_hwmgr.c | 4719 const struct vega10_power_state *psb; local in function:vega10_check_states_equal 4726 psb = cast_const_phw_vega10_power_state(pstate2); 4728 if (psa->performance_level_count != psb->performance_level_count) { 4734 if (!vega10_are_power_levels_equal(&(psa->performance_levels[i]), &(psb->performance_levels[i]))) { 4742 *equal = ((psa->uvd_clks.vclk == psb->uvd_clks.vclk) && (psa->uvd_clks.dclk == psb->uvd_clks.dclk)); 4743 *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); 4744 *equal &= (psa->sclk_threshold == psb->sclk_threshold);
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amdgpu_smu7_hwmgr.c | 4210 const struct smu7_power_state *psb; local in function:smu7_check_states_equal 4218 psb = cast_const_phw_smu7_power_state(pstate2); 4220 if (psa->performance_level_count != psb->performance_level_count) { 4226 if (!smu7_are_power_levels_equal(&(psa->performance_levels[i]), &(psb->performance_levels[i]))) { 4234 *equal = ((psa->uvd_clks.vclk == psb->uvd_clks.vclk) && (psa->uvd_clks.dclk == psb->uvd_clks.dclk)); 4235 *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); 4236 *equal &= (psa->sclk_threshold == psb->sclk_threshold);
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