| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_base.c | 47 u8 pstate, u8 domain, u32 input)
54 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
117 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
124 if (!pstate || !cstate)
141 list_for_each_entry_from_reverse(cstate, &pstate->list, head) {
150 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
154 return list_last_entry(&pstate->list, typeof(*cstate), head);
156 list_for_each_entry(cstate, &pstate->list, head) {
165 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
174 if (!list_empty(&pstate->list))
275 struct nvkm_pstate *pstate; local in function:nvkm_pstate_prog
307 int pstate; local in function:nvkm_pstate_work
438 struct nvkm_pstate *pstate; local in function:nvkm_pstate_new
507 struct nvkm_pstate *pstate; local in function:nvkm_clk_ustate_update
660 struct nvkm_pstate *pstate, *temp; local in function:nvkm_clk_dtor
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_xgmi.h | 40 int pstate; /*0 -- low , 1 -- high , -1 unknown*/ member in struct:amdgpu_hive_info
48 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
|
| amdgpu_xgmi.c | 281 tmp->pstate = -1;
287 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
293 bool is_high_pstate = pstate && adev->asic_type == CHIP_VEGA20;
300 if (hive->pstate == pstate) {
301 adev->pstate = is_high_pstate ? pstate : adev->pstate;
305 dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate);
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| cstep.h | 10 u8 pstate; member in struct:nvbios_cstepE
17 u32 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
|
| vpstate.h | 21 u8 pstate; member in struct:nvbios_vpstate_entry
|
| boost.h | 9 u8 pstate; member in struct:nvbios_boostE
|
| perf.h | 10 u8 pstate; member in struct:nvbios_perfE
|
| /src/sys/arch/sparc/stand/ofwboot/ |
| srt0.s | 102 wrpr %g0, PSTATE_PRIV+PSTATE_IE, %pstate
158 rdpr %pstate, %l0
160 wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate
161 wrpr %l0, %g0, %pstate
176 rdpr %pstate, %l0
188 wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate ! Enable 64-bit addresses for the prom
189 wrpr %l0, 0, %pstate
278 rdpr %pstate, %o4
279 wrpr %o4, PSTATE_IE, %pstate
285 wrpr %o4, 0, %pstate
[all...] |
| /src/sys/external/bsd/drm2/amdgpu/ |
| amdgpu_xgmi.c | 62 amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
| if0001.h | 16 __s8 ustate_ac; /* out: target pstate index */
17 __s8 ustate_dc; /* out: target pstate index */
21 __s8 pstate; /* out: current pstate index */ member in struct:nvif_control_pstate_info_v0
28 __s8 state; /* in: index of pstate to query
29 * out: pstate identifier
45 __s8 ustate; /* in: pstate identifier */
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/ |
| nouveau_nvkm_engine_device_ctrl.c | 48 nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size);
50 nvif_ioctl(&ctrl->object, "control pstate info vers %d\n",
60 args->v0.pstate = clk->pstate;
66 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN;
80 struct nvkm_pstate *pstate; local in function:nvkm_control_mthd_pstate_attr
86 nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size);
89 "control pstate attr vers %d state %d index %d\n",
111 list_for_each_entry(pstate, &clk->states, head) {
116 lo = pstate->base.domain[domain->name]
[all...] |
| /src/sys/arch/arm/apple/ |
| apple_pmgr.c | 73 const uint32_t pstate = enable ? PMGR_PS_ACTIVE : PMGR_PS_PWRGATE; local in function:apple_pmgr_enable
88 val |= __SHIFTIN(pstate, PMGR_PS_TARGET_MASK);
93 if (__SHIFTOUT(val, PMGR_PS_ACTUAL_MASK) == pstate)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/ |
| nouveau_nvkm_subdev_bios_boost.c | 86 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5;
94 nvbios_boostEm(struct nvkm_bios *bios, u8 pstate,
99 if (info->pstate == pstate)
|
| nouveau_nvkm_subdev_bios_cstep.c | 83 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5;
90 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr,
95 if (info->pstate == pstate)
|
| nouveau_nvkm_subdev_bios_vpstate.c | 90 e->pstate = nvbios_rd08(b, offset);
|
| /src/sys/arch/sparc64/include/ |
| psl.h | 107 * SPARC V9 PSTATE register (what replaces the PSR in V9)
171 * | CCR | ASI | - | PSTATE | - | CWP |
378 SPARC64_RDPR_DEF(pstate, %pstate, int) /* getpstate() */
379 SPARC64_WRPR_DEF(pstate, %pstate, int) /* setpstate() */
413 int pstate = getpstate(); variable in typeref:typename:int
415 setpstate(pstate & ~PSTATE_IE);
416 return pstate;
420 intr_restore(int pstate)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
| clk.h | 13 #define NVKM_CLK_CSTATE_BASE -2 /* pstate base */
69 u8 pstate; member in struct:nvkm_pstate
106 int pstate; /* current */ member in struct:nvkm_clk
|
| /src/sys/compat/linux/arch/aarch64/ |
| linux_machdep.h | 57 uint64_t pstate; member in struct:linux_sigcontext
|
| linux_machdep.c | 70 ctx->pstate = uc.uc_mcontext.__gregs[_REG_SPSR];
116 uc->uc_mcontext.__gregs[_REG_SPSR] = ctx->pstate;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| kgd_pp_interface.h | 39 u8 pstate; member in struct:amd_vce_state
326 int (*set_xgmi_pstate)(void *handle, uint32_t pstate);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pmu/ |
| nouveau_nvkm_subdev_pmu_gk20a.c | 68 *state = clk->pstate;
79 /* For GK20A, the performance level is directly mapped to pstate */
80 level = cur_level = clk->pstate;
|
| /src/sys/arch/sparc64/sparc64/ |
| mp_subr.S | 346 rdpr %pstate, %g2 ! enable FP before we begin
350 wrpr %g2, 0, %pstate
423 rdpr %pstate, %g1
426 wrpr %g1, 0, %pstate
|
| cpu.c | 750 int i, pstate; local in function:cpu_boot_secondary_processors
774 pstate = getpstate();
800 setpstate(pstate);
|
| locore.s | 187 wrpr %g0, PSTATE_KERN, %pstate ! Alternate Globals (AG) bit set to zero
196 wrpr %g0, PSTATE_KERN|PSTATE_AG, %pstate ! Alternate Globals (AG) bit set to one
200 rdpr %pstate, \scratch
202 wrpr %g0, \scratch, %pstate
206 rdpr %pstate, \scratch
208 wrpr %g0, \scratch, %pstate
2088 wrpr %g0, PSTATE_KERN|PSTATE_IG, %pstate ! We need to save volatile stuff to interrupt globals
2090 wrpr %g0, PSTATE_KERN|PSTATE_AG, %pstate ! We need to save volatile stuff to alternate globals
2450 wrpr %g0, PSTATE_KERN|PSTATE_IG, %pstate ! DEBUG
2452 wrpr %g0, PSTATE_KERN|PSTATE_AG, %pstate
[all...] |
| copy.S | 805 rdpr %pstate, %g1
806 wrpr %g1, PSTATE_AM, %pstate
833 wrpr %g1, 0, %pstate
849 wrpr %g1, 0, %pstate
|
