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  /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/
cl006b.h 12 __u64 pushbuf; member in struct:nv03_channel_dma_v0
cl507c.h 11 __u64 pushbuf; member in struct:nv50_disp_base_channel_dma_v0
cl507d.h 10 __u64 pushbuf; member in struct:nv50_disp_core_channel_dma_v0
cl507e.h 11 __u64 pushbuf; member in struct:nv50_disp_overlay_channel_dma_v0
clc37b.h 11 __u64 pushbuf; member in struct:nvc37b_window_imm_channel_dma_v0
clc37e.h 11 __u64 pushbuf; member in struct:nvc37e_window_channel_dma_v0
cl506e.h 12 __u64 pushbuf; member in struct:nv50_channel_dma_v0
cl506f.h 13 __u64 pushbuf; member in struct:nv50_channel_gpfifo_v0
cl826e.h 12 __u64 pushbuf; member in struct:g82_channel_dma_v0
cl826f.h 13 __u64 pushbuf; member in struct:g82_channel_gpfifo_v0
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/
nouveau_nvkm_engine_fifo_dmag84.c 53 "pushbuf %"PRIx64" offset %016"PRIx64"\n",
54 args->v0.version, args->v0.vmm, args->v0.pushbuf,
56 if (!args->v0.pushbuf)
65 ret = g84_fifo_chan_ctor(fifo, args->v0.vmm, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_dmanv10.c 56 nvif_ioctl(parent, "create channel dma vers %d pushbuf %"PRIx64" "
58 args->v0.pushbuf, args->v0.offset);
59 if (!args->v0.pushbuf)
69 0x1000, 0x1000, false, 0, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_dmanv17.c 56 nvif_ioctl(parent, "create channel dma vers %d pushbuf %"PRIx64" "
58 args->v0.pushbuf, args->v0.offset);
59 if (!args->v0.pushbuf)
69 0x1000, 0x1000, false, 0, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_dmanv50.c 53 "pushbuf %"PRIx64" offset %016"PRIx64"\n",
54 args->v0.version, args->v0.vmm, args->v0.pushbuf,
56 if (!args->v0.pushbuf)
65 ret = nv50_fifo_chan_ctor(fifo, args->v0.vmm, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_gpfifog84.c 54 "pushbuf %"PRIx64" ioffset %016"PRIx64" "
56 args->v0.version, args->v0.vmm, args->v0.pushbuf,
58 if (!args->v0.pushbuf)
67 ret = g84_fifo_chan_ctor(fifo, args->v0.vmm, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_gpfifonv50.c 54 "pushbuf %"PRIx64" ioffset %016"PRIx64" "
56 args->v0.version, args->v0.vmm, args->v0.pushbuf,
58 if (!args->v0.pushbuf)
67 ret = nv50_fifo_chan_ctor(fifo, args->v0.vmm, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_dmanv04.c 185 nvif_ioctl(parent, "create channel dma vers %d pushbuf %"PRIx64" "
187 args->v0.pushbuf, args->v0.offset);
188 if (!args->v0.pushbuf)
198 0x1000, 0x1000, false, 0, args->v0.pushbuf,
nouveau_nvkm_engine_fifo_dmanv40.c 203 nvif_ioctl(parent, "create channel dma vers %d pushbuf %"PRIx64" "
205 args->v0.pushbuf, args->v0.offset);
206 if (!args->v0.pushbuf)
216 0x1000, 0x1000, false, 0, args->v0.pushbuf,
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/
nouveau_nvkm_engine_disp_ovlynv50.c 54 "pushbuf %016"PRIx64" head %d\n",
55 args->v0.version, args->v0.pushbuf, args->v0.head);
58 push = args->v0.pushbuf;
nouveau_nvkm_engine_disp_wimmgv100.c 68 "pushbuf %016"PRIx64" index %d\n",
69 args->v0.version, args->v0.pushbuf, args->v0.index);
72 push = args->v0.pushbuf;
nouveau_nvkm_engine_disp_basenv50.c 54 "pushbuf %016"PRIx64" head %d\n",
55 args->v0.version, args->v0.pushbuf, args->v0.head);
58 push = args->v0.pushbuf;
nouveau_nvkm_engine_disp_wndwgv100.c 170 "pushbuf %016"PRIx64" index %d\n",
171 args->v0.version, args->v0.pushbuf, args->v0.index);
174 push = args->v0.pushbuf;
nouveau_nvkm_engine_disp_corenv50.c 54 "pushbuf %016"PRIx64"\n",
55 args->v0.version, args->v0.pushbuf);
56 push = args->v0.pushbuf;
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/
nouveau_dispnv50_wimmc37b.c 69 .pushbuf = 0xb0007b00 | wndw->id,
  /src/sys/external/bsd/drm2/dist/drm/nouveau/
nouveau_chan.c 167 * pushbuf lives in, this is because the GEM code requires that
192 /* nv04 vram pushbuf hack, retarget to its location in
293 args.nv50.pushbuf = nvif_handle(&chan->push.ctxdma);
345 args.pushbuf = nvif_handle(&chan->push.ctxdma);

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