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    Searched refs:qat_misc_write_4 (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/dev/pci/qat/
qat_c62x.c 169 qat_misc_write_4(sc, SMIAPF0_C62X, SMIA0_MASK_C62X);
170 qat_misc_write_4(sc, SMIAPF1_C62X, SMIA1_MASK_C62X);
194 qat_misc_write_4(sc, ERRMSK0, ERRMSK0_CERR_C62X); /* ME0-ME3 */
195 qat_misc_write_4(sc, ERRMSK1, ERRMSK1_CERR_C62X); /* ME4-ME7 */
196 qat_misc_write_4(sc, ERRMSK4, ERRMSK4_CERR_C62X); /* ME8-ME9 */
197 qat_misc_write_4(sc, ERRMSK5, ERRMSK5_CERR_C62X); /* SSM2-SSM4 */
205 qat_misc_write_4(sc, RICPPINTCTL_C62X, RICPP_EN_C62X);
208 qat_misc_write_4(sc, TICPPINTCTL_C62X, TICPP_EN_C62X);
211 qat_misc_write_4(sc, CPP_CFC_ERR_CTRL_C62X, CPP_CFC_UE_C62X);
214 qat_misc_write_4(sc, SECRAMCERR_C62X, SECRAM_CERR_C62X)
    [all...]
qat_d15xx.c 169 qat_misc_write_4(sc, SMIAPF0_D15XX, SMIA0_MASK_D15XX);
170 qat_misc_write_4(sc, SMIAPF1_D15XX, SMIA1_MASK_D15XX);
194 qat_misc_write_4(sc, ERRMSK0, ERRMSK0_CERR_D15XX); /* ME0-ME3 */
195 qat_misc_write_4(sc, ERRMSK1, ERRMSK1_CERR_D15XX); /* ME4-ME7 */
196 qat_misc_write_4(sc, ERRMSK4, ERRMSK4_CERR_D15XX); /* ME8-ME9 */
197 qat_misc_write_4(sc, ERRMSK5, ERRMSK5_CERR_D15XX); /* SSM2-SSM4 */
205 qat_misc_write_4(sc, RICPPINTCTL_D15XX, RICPP_EN_D15XX);
208 qat_misc_write_4(sc, TICPPINTCTL_D15XX, TICPP_EN_D15XX);
211 qat_misc_write_4(sc, CPP_CFC_ERR_CTRL_D15XX, CPP_CFC_UE_D15XX);
214 qat_misc_write_4(sc, SECRAMCERR_D15XX, SECRAM_CERR_D15XX)
    [all...]
qat_c3xxx.c 167 qat_misc_write_4(sc, SMIAPF0_C3XXX, SMIA0_MASK_C3XXX);
168 qat_misc_write_4(sc, SMIAPF1_C3XXX, SMIA1_MASK_C3XXX);
192 qat_misc_write_4(sc, ERRMSK0, ERRMSK0_CERR_C3XXX); /* ME0-ME3 */
193 qat_misc_write_4(sc, ERRMSK1, ERRMSK1_CERR_C3XXX); /* ME4-ME5 */
194 qat_misc_write_4(sc, ERRMSK5, ERRMSK5_CERR_C3XXX); /* SSM2 */
200 qat_misc_write_4(sc, RICPPINTCTL_C3XXX, RICPP_EN_C3XXX);
203 qat_misc_write_4(sc, TICPPINTCTL_C3XXX, TICPP_EN_C3XXX);
206 qat_misc_write_4(sc, CPP_CFC_ERR_CTRL_C3XXX, CPP_CFC_UE_C3XXX);
213 qat_misc_write_4(sc, ERRMSK0, ERRMSK0_UERR_C3XXX | ERRMSK0_CERR_C3XXX);
215 qat_misc_write_4(sc, ERRMSK1, ERRMSK1_UERR_C3XXX | ERRMSK1_CERR_C3XXX)
    [all...]
qat_hw17.c 127 qat_misc_write_4(sc, ADMINMSGUR, addr >> 32);
128 qat_misc_write_4(sc, ADMINMSGLR, addr);
151 qat_misc_write_4(sc, mb_offset, 1);
322 qat_misc_write_4(sc, SSMWDT(i), timer);
323 qat_misc_write_4(sc, SSMWDTPKE(i), timer);
qat_c2xxx.c 144 qat_misc_write_4(sc, EP_SMIA_C2XXX, EP_SMIA_MASK_C2XXX);
qatvar.h 958 qat_misc_write_4(struct qat_softc *sc, bus_size_t offset, uint32_t value) function
979 qat_misc_write_4(sc, offset, reg);
990 qat_misc_write_4(sc, offset, reg);
1015 qat_misc_write_4(sc, sc->sc_hw.qhw_ae_local_offset + offset,
1036 qat_misc_write_4(sc, sc->sc_hw.qhw_ae_offset + offset, value);
1043 qat_misc_write_4(sc, sc->sc_hw.qhw_cap_global_offset + offset, value);

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