| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 603 QoS_LEVEL_FIXED, &ttu_attr.qos_level_fixed_cur0,
637 if (ttu_attr.qos_level_fixed_cur0 != dml_ttu_attr->qos_level_fixed_cur0)
639 dml_ttu_attr->qos_level_fixed_cur0, ttu_attr.qos_level_fixed_cur0);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 389 "DML_RQ_DLG_CALC: qos_level_fixed_cur0 = 0x%0x\n",
390 ttu_regs.qos_level_fixed_cur0);
|
| display_mode_structs.h | 486 unsigned int qos_level_fixed_cur0; member in struct:_vcs_dpi_display_ttu_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1909 disp_ttu_regs->qos_level_fixed_cur0 = 8;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 168 QoS_LEVEL_FIXED, ttu_attr->qos_level_fixed_cur0,
1505 QoS_LEVEL_FIXED, &ttu_attr.qos_level_fixed_cur0,
1539 if (ttu_attr.qos_level_fixed_cur0 != dml_ttu_attr->qos_level_fixed_cur0)
1541 dml_ttu_attr->qos_level_fixed_cur0, ttu_attr.qos_level_fixed_cur0);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 321 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0,
|
| amdgpu_dcn10_hubp.c | 663 QoS_LEVEL_FIXED, ttu_attr->qos_level_fixed_cur0,
|
| amdgpu_dcn10_hw_sequencer.c | 267 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 1555 disp_ttu_regs->qos_level_fixed_cur0 = 8;
|
| amdgpu_display_rq_dlg_calc_20v2.c | 1556 disp_ttu_regs->qos_level_fixed_cur0 = 8;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 1655 disp_ttu_regs->qos_level_fixed_cur0 = 8;
|
