| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 595 QoS_LEVEL_FIXED, &ttu_attr.qos_level_fixed_l,
619 if (ttu_attr.qos_level_fixed_l != dml_ttu_attr->qos_level_fixed_l)
621 dml_ttu_attr->qos_level_fixed_l, ttu_attr.qos_level_fixed_l);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 377 "DML_RQ_DLG_CALC: qos_level_fixed_l = 0x%0x\n",
378 ttu_regs.qos_level_fixed_l);
|
| display_mode_structs.h | 484 unsigned int qos_level_fixed_l; member in struct:_vcs_dpi_display_ttu_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1907 disp_ttu_regs->qos_level_fixed_l = 8;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 158 QoS_LEVEL_FIXED, ttu_attr->qos_level_fixed_l,
1167 QoS_LEVEL_FIXED, &ttu_attr->qos_level_fixed_l,
1497 QoS_LEVEL_FIXED, &ttu_attr.qos_level_fixed_l,
1521 if (ttu_attr.qos_level_fixed_l != dml_ttu_attr->qos_level_fixed_l)
1523 dml_ttu_attr->qos_level_fixed_l, ttu_attr.qos_level_fixed_l);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 320 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
|
| amdgpu_dcn10_hubp.c | 653 QoS_LEVEL_FIXED, ttu_attr->qos_level_fixed_l,
975 QoS_LEVEL_FIXED, &ttu_attr->qos_level_fixed_l,
|
| amdgpu_dcn10_hw_sequencer.c | 266 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
1701 "qos_level_fixed_l: %d, \n"
1715 pipe_ctx->ttu_regs.qos_level_fixed_l,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 1553 disp_ttu_regs->qos_level_fixed_l = 8;
|
| amdgpu_display_rq_dlg_calc_20v2.c | 1554 disp_ttu_regs->qos_level_fixed_l = 8;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 1653 disp_ttu_regs->qos_level_fixed_l = 8;
|
