| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 162 (s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % frac,
182 (s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % frac,
316 pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
|
| amdgpu_dcn10_hubp.c | 645 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm,
963 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm,
1027 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm,
|
| dcn10_hubp.h | 378 HUBP_SF(HUBPREQ0_DCN_TTU_QOS_WM, QoS_LEVEL_LOW_WM, mask_sh),\
585 type QoS_LEVEL_LOW_WM;\
679 uint32_t qos_level_low_wm; member in struct:dcn_hubp_state
|
| amdgpu_dcn10_hw_sequencer.c | 189 DTN_INFO_MICRO_SEC(s->qos_level_low_wm);
262 pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
1696 "qos_level_low_wm: %d, \n"
1710 pipe_ctx->ttu_regs.qos_level_low_wm,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 581 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm,
584 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm)
585 DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_LOW_WM - Expected: %u Actual: %u\n",
586 dml_ttu_attr->qos_level_low_wm, ttu_attr.qos_level_low_wm);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 150 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm,
1155 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm,
1219 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm,
1483 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm,
1486 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 341 "DML_RQ_DLG_CALC: qos_level_low_wm = 0x%0x\n",
342 ttu_regs.qos_level_low_wm);
|
| display_mode_structs.h | 472 unsigned int qos_level_low_wm; member in struct:_vcs_dpi_display_ttu_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1900 disp_ttu_regs->qos_level_low_wm = 0;
1901 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 1546 disp_ttu_regs->qos_level_low_wm = 0;
1547 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14));
|
| amdgpu_display_rq_dlg_calc_20v2.c | 1547 disp_ttu_regs->qos_level_low_wm = 0;
1548 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 1646 disp_ttu_regs->qos_level_low_wm = 0;
1647 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14));
|
