| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 596 QoS_RAMP_DISABLE, &ttu_attr.qos_ramp_disable_l);
622 if (ttu_attr.qos_ramp_disable_l != dml_ttu_attr->qos_ramp_disable_l)
624 dml_ttu_attr->qos_ramp_disable_l, ttu_attr.qos_ramp_disable_l);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 380 "DML_RQ_DLG_CALC: qos_ramp_disable_l = 0x%0x\n",
381 ttu_regs.qos_ramp_disable_l);
|
| display_mode_structs.h | 488 unsigned int qos_ramp_disable_l; member in struct:_vcs_dpi_display_ttu_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1910 disp_ttu_regs->qos_ramp_disable_l = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 159 QoS_RAMP_DISABLE, ttu_attr->qos_ramp_disable_l);
1168 QoS_RAMP_DISABLE, &ttu_attr->qos_ramp_disable_l);
1498 QoS_RAMP_DISABLE, &ttu_attr.qos_ramp_disable_l);
1524 if (ttu_attr.qos_ramp_disable_l != dml_ttu_attr->qos_ramp_disable_l)
1526 dml_ttu_attr->qos_ramp_disable_l, ttu_attr.qos_ramp_disable_l);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 320 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
|
| amdgpu_dcn10_hubp.c | 654 QoS_RAMP_DISABLE, ttu_attr->qos_ramp_disable_l);
976 QoS_RAMP_DISABLE, &ttu_attr->qos_ramp_disable_l);
|
| amdgpu_dcn10_hw_sequencer.c | 266 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
1702 "qos_ramp_disable_l: %d, \n"
1716 pipe_ctx->ttu_regs.qos_ramp_disable_l,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 1556 disp_ttu_regs->qos_ramp_disable_l = 0;
|
| amdgpu_display_rq_dlg_calc_20v2.c | 1557 disp_ttu_regs->qos_ramp_disable_l = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 1656 disp_ttu_regs->qos_ramp_disable_l = 0;
|
