| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_queue.c | 39 pr_debug("Queue Size: %llu\n", q->queue_size);
56 pr_debug("Queue Size: %llu\n", q->properties.queue_size);
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| kfd_kernel_queue.c | 46 enum kfd_queue_type type, unsigned int queue_size)
56 queue_size);
89 retval = kfd_gtt_sa_allocate(dev, queue_size, &kq->pq);
91 pr_err("Failed to init pq queues size %d\n", queue_size);
128 memset(kq->pq_kernel_addr, 0, queue_size);
132 prop.queue_size = queue_size;
250 queue_size_dwords = kq->queue->properties.queue_size / 4;
321 (kq->queue->properties.queue_size / 4);
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| kfd_mqd_manager_cik.c | 176 uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1);
210 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
246 m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4)
333 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
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| kfd_mqd_manager_vi.c | 167 uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1);
185 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
355 m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
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| kfd_mqd_manager_v10.c | 178 ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;
332 m->sdmax_rlcx_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
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| kfd_mqd_manager_v9.c | 215 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
375 m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
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| kfd_priv.h | 379 * @queue_size: Queue ring buffer size.
423 uint64_t queue_size; member in struct:queue_properties
452 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \
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| kfd_process_queue_manager.c | 432 pqn->q->properties.queue_size = p->queue_size;
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| kfd_chardev.c | 224 q_properties->queue_size = args->ring_size;
258 q_properties->queue_size, args->ring_size);
398 properties.queue_size = args->ring_size;
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_amdkfd_gfx_v10.c | 307 uint32_t queue_size = local in function:kgd_hqd_load
309 CP_HQD_PQ_CONTROL, QUEUE_SIZE);
310 uint64_t guessed_wptr = m->cp_hqd_pq_rptr & (queue_size - 1);
312 if ((m->cp_hqd_pq_wptr_lo & (queue_size - 1)) < guessed_wptr)
313 guessed_wptr += queue_size;
314 guessed_wptr += m->cp_hqd_pq_wptr_lo & ~(queue_size - 1);
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| amdgpu_amdkfd_gfx_v9.c | 297 uint32_t queue_size = local in function:kgd_gfx_v9_hqd_load
299 CP_HQD_PQ_CONTROL, QUEUE_SIZE);
300 uint64_t guessed_wptr = m->cp_hqd_pq_rptr & (queue_size - 1);
302 if ((m->cp_hqd_pq_wptr_lo & (queue_size - 1)) < guessed_wptr)
303 guessed_wptr += queue_size;
304 guessed_wptr += m->cp_hqd_pq_wptr_lo & ~(queue_size - 1);
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| /src/sys/dev/pci/ |
| if_ena.c | 1315 ctx.queue_size = adapter->tx_ring_size;
1343 ctx.queue_size = adapter->rx_ring_size;
3108 uint32_t queue_size = ENA_DEFAULT_RING_SIZE; local in function:ena_calc_queue_size
3112 queue_size = min_t(uint32_t, queue_size,
3114 queue_size = min_t(uint32_t, queue_size,
3118 v = queue_size;
3120 if (powerof2(queue_size) != 0)
3123 q = rounddown2(queue_size, v)
3689 int queue_size; local in function:ena_attach
[all...] |
| /src/sys/external/bsd/ena-com/ |
| ena_com.h | 387 u16 queue_size; member in struct:ena_com_create_io_ctx
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| ena_com.c | 1803 io_cq->q_depth = ctx->queue_size;
1809 io_sq->q_depth = ctx->queue_size;
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| /src/usr.sbin/syslogd/ |
| syslogd.c | 149 int64_t queue_size; member in struct:TypeInfo
3303 &TypeInfo[i].queue_size) == -1)
3305 &TypeInfo[i].queue_size) == -1)
3685 TypeInfo[F_TLS].queue_size, TypeInfo[F_FILE].queue_size,
3686 TypeInfo[F_PIPE].queue_size);
4532 || (TypeInfo[f->f_type].queue_size != -1
4533 && (size_t)TypeInfo[f->f_type].queue_size <= f->f_qsize)) {
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