| /src/libexec/ld.elf_so/arch/sh3/ |
| rtld_start.S | 51 mov.l r5,@-r15 /* save relocbase */
54 mov.l @r15+,r5 /* restore relocbase */
55 add #-8,r15 /* room for values returned by _rtld */
56 mov r15,r4
59 mov.l r9,@-r15 /* save ps_strings */
61 mov.l @r15+,r9 /* restore ps_strings */
63 mov.l @r15+,r7 /* from _rtld: exit procedure */
64 mov.l @r15+,r8 /* from _rtld: main object */
66 mov.l @r15,r4 /* restore argc */
68 mov r15,r5 /* restore argv *
[all...] |
| /src/common/lib/libc/arch/ia64/string/ |
| ffs.S | 50 * Initialize return value (ret0), and set up r15 so that it
53 sub r15=r0,r14
55 and r15=r14,r15 ;;
57 extr.u r16=r15,0,8 ;;
64 extr.u r16=r15,0,16 ;;
67 extr.u r15=r15,16,16
74 extr.u r16=r15,0,8 ;;
77 extr.u r15=r15,8,2
[all...] |
| bzero.S | 47 1: add r15=-1,in1 ;;
48 mov ar.lc=r15 ;;
71 shr.u r15=in1,3 // word count
73 cmp.eq p6,p0=r15,r0 // check for zero
77 add r15=-1,r15 ;;
78 mov ar.lc=r15 ;;
|
| bcopy.S | 51 extr.u r15=in1,0,3 ;; // dst & 7
52 cmp.eq p6,p0=r14,r15 // different alignment?
67 extr.u r15=in0,0,3 // src & 7
70 cmp.eq p7,p0=r0,r15 ;; // aligned now?
80 ld8 r15=[in0],8 ;; // copy word
81 st8 [in1]=r15,8
|
| /src/sys/arch/ia64/ia64/ |
| support.S | 71 * r15-r19 scratch
80 (p6) mov r15=7 // RR base for virtual addresses
81 (p7) mov r15=0 // RR base for physical addresses
89 dep r16=r15,r16,61,3 // new address of ar.bsp
90 dep r17=r15,r17,61,3 // new address of rp
91 dep sp=r15,sp,61,3 // new address of sp
102 dep r16=r15,r16,61,3 // new mode address for rfi
120 * r15-r18 scratch
127 movl r15=(IA64_PSR_I|IA64_PSR_IT|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFL|IA64_PSR_DFH)
130 andcm r14=r14,r15 // clear various xT bit
[all...] |
| syscall_stubs.S | 68 * r15 - Kernel register stack
87 mov r15=ar.k6 // Register stack
152 add r15=48,r16
156 st8 [r15]=r18 // rnat
181 mov r15=SYS_sigreturn
187 mov r15=SYS_exit
252 dep r15=r18,r15,0,9
269 mov ar.bspstore=r15
307 sub r27=r23,r15
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/fuc/ |
| gpc.fuc | 60 */ mov b32 $r15 reg /*
65 // In: $r15 error code (see os.h)
69 nv_wr32(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), $r15)
70 mov $r15 1
71 nv_wr32(NV_PGRAPH_FECS_INTR_UP_SET, $r15)
88 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE /*
89 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
92 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE /*
93 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
96 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL /
[all...] |
| hub.fuc | 52 // In: $r15 error code (see os.h)
55 nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
56 mov $r15 1
57 nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
122 extr $r1 $r15 16:20
124 and $r15 0x1f
125 st b32 D[$r0 + #gpc_count] $r15
129 shl b32 $r1 $r15
138 mov $r15 2
141 mov $r15 0x1
[all...] |
| com.fuc | 31 // $r15 data
40 mov $r15 E_CMD_OVERFLOW
51 st b32 D[$r8 + 0x4] $r15
65 // $r15 data
79 ld b32 $r15 D[$r9 + 0x4]
92 // Out: $r15 value
104 nv_iord($r15, NV_PGRAPH_FECS_MMIO_RDVAL, 0)
110 // $r15 value
113 nv_iowr(NV_PGRAPH_FECS_MMIO_WRVAL, 0, $r15)
155 // $r15 mmio list tai
[all...] |
| /src/lib/libc/compat/arch/sh3/sys/ |
| compat___sigtramp1.S | 43 mov r15, r4 /* get pointer to sigcontext */
|
| /src/sys/arch/mvmeppc/stand/libsa/ |
| srt0.S | 91 LDCONST(%r15,0x3)
92 add %r14,%r14,%r15
93 andc %r14,%r14,%r15 /* Rounded up to the nearest 32-bits */
94 sub %r15,%r14,%r13 /* Our size, in bytes */
104 add %r16,%r16,%r15 /* src + size */
110 * %r15 -> number of bytes
114 1: srwi %r15,%r15,0x2 /* Convert length to 32-bit words */
115 mtctr %r15 /* Save in counter register */
117 2: lwz %r15,0(%r16
[all...] |
| /src/sys/arch/amd64/include/ |
| i82093reg.h | 55 movq IOAPIC_SC_REG(%rdi),%r15 ;\
56 movl %esi, (%r15) ;\
57 movq IOAPIC_SC_DATA(%rdi),%r15 ;\
58 movl (%r15),%esi ;\
61 movl %esi,(%r15) ;\
73 movq IOAPIC_SC_REG(%rdi),%r15 ;\
75 movl %esi, (%r15) ;\
78 movl %esi,(%r15) ;\
|
| /src/common/lib/libc/arch/or1k/string/ |
| memcmp.S | 92 l.lwz r15, 0(r3) /* load word from s1 */
96 l.sll r15, r15, r7 /* shift away leading bytes */
102 l.lwz r15, 0(r3) /* load s1 word */
105 l.sfeq r15, r17 /* compare s1 and s2 words */
125 l.srl r15, r15, r3 /* discard extra s1 bytes */
128 l.sfeq r17, r15 /* compare result */
149 l.lbz r15, 1(r3)
154 l.lhz r15, 0(r3
[all...] |
| strlen.S | 69 l.movhi r15, 0xfefe
71 l.ori r15, r15, 0xfeff
94 l.add r5, r8, r15 /* t2 = x + 0xfefefeff */
|
| /src/lib/libc/arch/x86_64/sys/ |
| __sigtramp2.S | 53 .cfi_def_cfa r15, 0
69 .cfi_offset r15, UC_GREGS_R15
73 movq %r15,%rdi
|
| /src/lib/libc/arch/ia64/sys/ |
| brk.S | 51 ld8 r15=[sp]
54 st8 [r14]=r15
|
| sbrk.S | 59 ld8 r15 = [sp]
65 st8 [r14] = r15
|
| /src/tests/kernel/arch/x86_64/ |
| execregs.c | 65 register long r15 __asm("r15") = nonnull(15);
87 "+r"(r15),
108 register long r15 __asm("r15") = nonnull(15);
141 "+r"(r15),
|
| /src/sys/arch/sh3/sh3/ |
| locore_subr.S | 61 mov.l r15, @-pcb ; \
127 mov r3, r15
427 mov r15, r4 /* get pointer to sigcontext */
459 mov.l r14, @-r15
460 sts.l pr, @-r15
461 mov r15, r14
488 mov r14, r15
489 lds.l @r15+, pr
491 mov.l @r15+, r14
514 mov.l r14, @-r15
[all...] |
| /src/sys/arch/landisk/stand/bootxx/ |
| bootxx.S | 53 mov.l .L.2nd_loadaddr, r15 /* new stack pointer */
54 mov.l r4, @-r15
57 mov r15, r4
61 mov.l @r15+, r5 /* pass boot sector to boot */
|
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_scalarmult/curve25519/sandy2x/ |
| fe51_mul.S | 30 movq %r15,32(%rsp)
62 mov %rdx,%r15
78 adc %rdx,%r15
95 adc %rdx,%r15
113 adc %rdx,%r15
141 adc %rdx,%r15
151 shld $13,%r14,%r15
156 add %r15,%rbx
189 movq 32(%rsp),%r15
|
| fe51_nsquare.S | 32 movq %r15,32(%rsp)
63 mov %rax,%r15
76 add %rax,%r15
118 add %rax,%r15
120 shld $13,%r15,%rbx
129 and %rdx,%r15
130 add %r14,%r15
143 add %r15,%r9
166 movq 32(%rsp),%r15
|
| /src/sys/arch/ia64/stand/ia64/efi/ |
| start.S | 129 // r15 = r_offset
149 add r15=r29,gp
163 ld8 r16=[r15],8 // read r15->d_tag
165 ld8 r17=[r15],8 // and r15->d_val
213 add r15=r29,in0 // relocate r_offset
254 st8 [r15]=r29,8 // fdesc:FP
256 st8 [r15]=gp // fdesc:GP
263 st4 [r15]=r2
[all...] |
| /src/lib/libc/arch/sh3/gen/ |
| _setjmp.S | 58 mov.l r15, @-r4
80 mov.l @r4+, r15
|
| /src/lib/libc/arch/x86_64/gen/ |
| _setjmp.S | 62 movq %r15,(_JB_R15 * 8)(%rdi)
76 movq (_JB_R15 * 8)(%rdi),%r15
|
