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    Searched refs:ratios (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dpp.c 399 if (scl_data->ratios.horz.value == (8ll << 32))
400 scl_data->ratios.horz.value--;
401 if (scl_data->ratios.vert.value == (8ll << 32))
402 scl_data->ratios.vert.value--;
403 if (scl_data->ratios.horz_c.value == (8ll << 32))
404 scl_data->ratios.horz_c.value--;
405 if (scl_data->ratios.vert_c.value == (8ll << 32))
406 scl_data->ratios.vert_c.value--;
410 if (dc_fixpt_ceil(scl_data->ratios.horz) > 4)
417 if (dc_fixpt_ceil(scl_data->ratios.vert) > 4
    [all...]
amdgpu_dcn20_resource.c 1764 sd->ratios.horz, sd->recout.width - new_width));
1766 sd->ratios.horz_c, sd->recout.width - new_width));
1778 sd->ratios.horz, sd->recout.width - new_width));
1780 sd->ratios.horz_c, sd->recout.width - new_width));
1783 sd->ratios.horz, sd->h_active - sd->recout.x));
1785 sd->ratios.horz_c, sd->h_active - sd->recout.x));
2147 pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = (double) scl->ratios.horz.value / (1ULL<<32);
2148 pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio_c = (double) scl->ratios.horz_c.value / (1ULL<<32);
2149 pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = (double) scl->ratios.vert.value / (1ULL<<32);
2150 pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio_c = (double) scl->ratios.vert_c.value / (1ULL<<32)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_dpp.c 152 scl_data->ratios.horz.value != dc_fixpt_one.value &&
153 scl_data->ratios.vert.value != dc_fixpt_one.value)
164 if (scl_data->ratios.horz.value == (4ll << 32))
165 scl_data->ratios.horz.value--;
166 if (scl_data->ratios.vert.value == (4ll << 32))
167 scl_data->ratios.vert.value--;
168 if (scl_data->ratios.horz_c.value == (4ll << 32))
169 scl_data->ratios.horz_c.value--;
170 if (scl_data->ratios.vert_c.value == (4ll << 32))
171 scl_data->ratios.vert_c.value--
    [all...]
amdgpu_dcn10_dpp_dscl.c 185 if (data->ratios.horz.value == one
186 && data->ratios.vert.value == one
187 && data->ratios.horz_c.value == one
188 && data->ratios.vert_c.value == one
198 if (data->ratios.horz.value == one && data->ratios.vert.value == one)
200 if (data->ratios.horz_c.value == one && data->ratios.vert_c.value == one)
340 scl_data->taps.h_taps, scl_data->ratios.horz);
342 scl_data->taps.v_taps, scl_data->ratios.vert)
    [all...]
amdgpu_dcn10_hw_sequencer.c 2955 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz,
2956 .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_resource.c 716 /*Swap surf_src height and width since scaling ratios are in recout rotation*/
721 pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction(
724 pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction(
729 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
731 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;
733 pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(
734 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);
735 pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
736 pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);
738 pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_transform_v.c 383 dc_fixpt_u2d19(data->ratios.horz) << 5;
385 dc_fixpt_u2d19(data->ratios.vert) << 5;
387 dc_fixpt_u2d19(data->ratios.horz_c) << 5;
389 dc_fixpt_u2d19(data->ratios.vert_c) << 5;
567 coeffs_v = get_filter_coeffs_64p(data->taps.v_taps, data->ratios.vert);
568 coeffs_h = get_filter_coeffs_64p(data->taps.h_taps, data->ratios.horz);
569 coeffs_v_c = get_filter_coeffs_64p(data->taps.v_taps_c, data->ratios.vert_c);
570 coeffs_h_c = get_filter_coeffs_64p(data->taps.h_taps_c, data->ratios.horz_c);
amdgpu_dce110_hw_sequencer.c 2685 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz,
2686 .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_transform.c 264 dc_fixpt_u2d19(data->ratios.horz) << 5;
266 dc_fixpt_u2d19(data->ratios.vert) << 5;
271 data->ratios.horz,
280 data->ratios.vert,
357 coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert);
358 coeffs_h = get_filter_coeffs_16p(data->taps.h_taps, data->ratios.horz);
927 scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false);
928 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false);
929 scl_data->taps.h_taps_c = decide_taps(scl_data->ratios.horz_c, in_taps->h_taps, true);
930 scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
transform.h 179 struct scaling_ratios ratios; member in struct:scaler_data
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 390 input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0;
391 input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0;
398 input->scale_ratio_depth.hscl_ratio_c = pipe->plane_res.scl_data.ratios.horz_c.value/4294967296.0;
399 input->scale_ratio_depth.vscl_ratio_c = pipe->plane_res.scl_data.ratios.vert_c.value/4294967296.0;
951 ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
953 ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value
956 ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
958 ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value
amdgpu_dce_calcs.c 415 /*effective scaling source and ratios:*/
417 /*420 chroma has half the width, height, horizontal and vertical scaling ratios than luma*/
418 /*rotating a graphic or underlay surface swaps the width, height, horizontal and vertical scaling ratios*/
2809 data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);
2810 data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);
2865 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value);
2867 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value);
2911 data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);
2912 data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);

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