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    Searched refs:raw_reg_write (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_gt_irq.c 53 raw_reg_write(gt->uncore, GEN11_IIR_REG_SELECTOR(bank), BIT(bit));
71 raw_reg_write(gt->uncore, GEN11_INTR_IDENTITY_REG(bank),
146 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), intr_dw);
184 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), BIT(bit));
297 raw_reg_write(gt->uncore, GEN8_GT_IIR(0), gt_iir[0]);
303 raw_reg_write(gt->uncore, GEN8_GT_IIR(1), gt_iir[1]);
309 raw_reg_write(gt->uncore, GEN8_GT_IIR(2), gt_iir[2]);
315 raw_reg_write(gt->uncore, GEN8_GT_IIR(3), gt_iir[3]);
  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_uncore.h 494 #define raw_reg_write(uncore, reg, value) \ macro
500 #define raw_reg_write(base, reg, value) \ macro
i915_irq.c 2385 raw_reg_write(regs, GEN8_MASTER_IRQ, 0);
2398 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
2443 raw_reg_write(gt->uncore, GEN11_GU_MISC_IIR, iir);
2457 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
2470 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
2483 raw_reg_write(&i915->uncore, GEN11_DISPLAY_INT_CTL, 0x0);
2485 raw_reg_write(&i915->uncore, GEN11_DISPLAY_INT_CTL,

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