| /src/sys/arch/evbarm/stand/board/ |
| sscom.c | 187 #define read_reg(addr) (*(volatile uint32_t *)(addr)) macro
194 uint32_t pllcon = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_PLLCON);
195 uint32_t div = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON);
200 uint32_t pllcon = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_MPLLCON);
201 uint32_t div = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_CLKDIVN);
|
| /src/sys/dev/pci/igc/ |
| igc_phy.c | 34 phy->ops.read_reg = igc_null_read_reg;
148 if (!phy->ops.read_reg)
151 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
157 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
303 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
309 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
317 ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
498 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
617 if (!hw->phy.ops.read_reg)
622 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status)
[all...] |
| igc_mac.c | 599 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg);
602 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg);
615 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
619 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
|
| igc_hw.h | 233 int (*read_reg)(struct igc_hw *, uint32_t, uint16_t *); member in struct:igc_phy_operations
|
| igc_i225.c | 157 phy->ops.read_reg = igc_read_phy_reg_gpy;
|
| /src/sys/dev/pci/igma/ |
| igmafb.c | 382 r = co->read_reg(cd, PIPE_HTOTAL(pipe));
384 r = co->read_reg(cd, PIPE_VTOTAL(pipe));
392 r = co->read_reg(cd, PF_WINSZ(pipe));
421 r = co->read_reg(cd, sc->sc_chip.vga_cntrl);
442 r = co->read_reg(cd, PRI_CTRL(pipe));
472 if ((co->read_reg(cd, PIPE_CONF(pipe)) & PIPE_CONF_STATE) == 0)
477 r = co->read_reg(cd, 0x42000);
479 r = co->read_reg(cd, 0x42004);
489 r = co->read_reg(cd, sc->sc_chip.vga_cntrl);
514 fwbcl = co->read_reg(cd, FW_BLC_SELF)
[all...] |
| /src/sys/dev/pci/ |
| igmavar.h | 28 u_int32_t (*read_reg)(const struct igma_chip *, int); member in struct:igma_chip_ops
|
| igma.c | 302 reg = co->read_reg(cd, cd->vga_cntrl);
520 reg = co->read_reg(cd, ii->ii_reg);
541 reg = co->read_reg(cd, ii->ii_reg);
565 reg = co->read_reg(cd, ii->ii_reg);
|
| /src/sys/dev/ic/ |
| sc16is7xx.c | 194 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOSTATE, 1, &r, 1);
208 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOSTATE, 1, &r, 1);
225 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol, 1);
243 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol, 1);
248 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IODIR, 1, &iodir, 1);
416 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 0, &iocontrol_reg, 1);
422 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 0, &iocontrol_reg, 1);
461 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_LCR, 1, buf, 1);
500 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol_reg, 1);
576 error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol_reg, 1)
[all...] |
| bmx280var.h | 54 int (*read_reg)(struct bmx280_sc *, uint8_t, uint8_t *, member in struct:bmx280_accessfuncs
|
| sc16is7xxvar.h | 47 int (*read_reg)(struct sc16is7xx_sc *, uint8_t, int, uint8_t *, member in struct:sc16is7xx_accessfuncs
|
| bmx280.c | 452 error = sc->sc_funcs->read_reg(sc, reg, &chip_id, 1);
469 error = sc->sc_funcs->read_reg(sc, reg, raw_blob_tp, 24);
488 error = sc->sc_funcs->read_reg(sc, reg, raw_blob_h, 1);
495 error = sc->sc_funcs->read_reg(sc, reg, &raw_blob_h[1], 7);
740 ierror = sc->sc_funcs->read_reg(sc, reg, &running, 1);
795 ierror = sc->sc_funcs->read_reg(sc, reg, raw_press_temp_hum, rlen);
|
| /src/sys/dev/pci/ixgbe/ |
| ixgbe_phy.c | 264 phy->ops.read_reg = ixgbe_read_phy_reg_generic;
310 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
416 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,
440 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,
446 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW,
541 status = hw->phy.ops.read_reg(hw,
553 status = hw->phy.ops.read_reg(hw,
804 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
817 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
847 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG
[all...] |
| ixgbe_x550.c | 610 hw->phy.ops.read_reg = NULL;
2145 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
2154 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,
2164 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,
2178 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,
2194 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
2202 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,
2244 status = hw->phy.ops.read_reg(hw,
2262 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,
2280 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK
[all...] |
| ixgbe_82598.c | 621 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
665 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);
666 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);
667 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,
679 hw->phy.ops.read_reg(hw, 0xC79F,
682 hw->phy.ops.read_reg(hw, 0xC00C,
1249 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
|
| ixgbe_common.c | 281 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
628 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,
630 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,
632 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,
634 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,
3109 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
3112 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP,
|
| ixgbe_api.c | 540 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
|
| ixgbe_x540.c | 350 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
|
| ixgbe_82599.c | 2223 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
|
| /src/sys/dev/spi/ |
| bmx280thpspi.c | 142 .read_reg = bmx280thpspi_read_reg,
|
| sc16is7xxspi.c | 137 .read_reg = sc16is7xxspi_read_register,
|
| /src/sys/dev/podulebus/ |
| esp_podule.c | 99 uint8_t (*read_reg)(struct ncr53c9x_softc *, int); member in struct:__anon32a2576c0108
140 esc->sc_esp_glue.gl_read_reg = devices[i].read_reg;
|
| /src/sys/dev/usb/ |
| uchcom.c | 459 read_reg(struct uchcom_softc *sc, function in typeref:typename:usbd_status
503 return read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
596 err = read_reg(sc, UCHCOM_REG_BREAK, &brk, UCHCOM_REG_LCR, &lcr);
702 err = read_reg(sc, UCHCOM_REG_LCR, &lcr, UCHCOM_REG_LCR2, &lcr2);
|
| /src/sys/dev/i2c/ |
| bmx280thpi2c.c | 140 .read_reg = bmx280thpi2c_read_register,
|
| sc16is7xxi2c.c | 141 .read_reg = sc16is7xxi2c_read_register,
|
