HomeSort by: relevance | last modified time | path
    Searched refs:reader_wm_sets (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm_pp_smu.c 564 if (ranges->reader_wm_sets[i].wm_inst > 3)
568 ranges->reader_wm_sets[i].wm_inst;
570 ranges->reader_wm_sets[i].max_drain_clk_mhz * 1000;
572 ranges->reader_wm_sets[i].min_drain_clk_mhz * 1000;
574 ranges->reader_wm_sets[i].max_fill_clk_mhz * 1000;
576 ranges->reader_wm_sets[i].min_fill_clk_mhz * 1000;
684 if (ranges->reader_wm_sets[i].wm_inst > 3)
688 ranges->reader_wm_sets[i].wm_inst;
690 ranges->reader_wm_sets[i].max_drain_clk_mhz * 1000;
692 ranges->reader_wm_sets[i].min_drain_clk_mhz * 1000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr.c 424 ranges->reader_wm_sets[num_valid_sets].wm_inst = bw_params->wm_table.entries[i].wm_inst;
425 ranges->reader_wm_sets[num_valid_sets].wm_type = bw_params->wm_table.entries[i].wm_type;
427 ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
428 ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
431 if (ranges->reader_wm_sets[num_valid_sets].wm_type == WM_TYPE_PSTATE_CHG) {
433 ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = 0;
436 ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1;
438 ranges->reader_wm_sets[num_valid_sets].max_drain_clk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz;
442 ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
443 ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dm_pp_smu.h 92 struct pp_smu_wm_set_range reader_wm_sets[MAX_WATERMARK_SETS]; member in struct:pp_smu_wm_range_sets
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 1529 ranges.reader_wm_sets[0].wm_inst = WM_A;
1530 ranges.reader_wm_sets[0].min_drain_clk_mhz = min_dcfclk_khz / 1000;
1531 ranges.reader_wm_sets[0].max_drain_clk_mhz = overdrive / 1000;
1532 ranges.reader_wm_sets[0].min_fill_clk_mhz = min_fclk_khz / 1000;
1533 ranges.reader_wm_sets[0].max_fill_clk_mhz = overdrive / 1000;
1541 ranges.reader_wm_sets[0].wm_inst = WM_A;
1542 ranges.reader_wm_sets[0].min_drain_clk_mhz = 300;
1543 ranges.reader_wm_sets[0].max_drain_clk_mhz = 5000;
1544 ranges.reader_wm_sets[0].min_fill_clk_mhz = 800;
1545 ranges.reader_wm_sets[0].max_fill_clk_mhz = 5000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 3633 ranges.reader_wm_sets[0].wm_inst = i;
3634 ranges.reader_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
3635 ranges.reader_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
3636 ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
3637 ranges.reader_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
3642 ranges.reader_wm_sets[i].wm_inst = i;
3643 ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
3644 ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
3645 ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
3646 ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16
    [all...]

Completed in 107 milliseconds