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    Searched refs:ref_dppclk (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
dccg.h 37 int ref_dppclk; member in struct:dccg
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dccg.c 56 if (dccg->ref_dppclk && req_dppclk) {
57 int ref_dppclk = dccg->ref_dppclk; local in function:dccg2_update_dpp_dto
62 phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
amdgpu_dcn20_clk_mgr.c 113 clk_mgr->dccg->ref_dppclk = clk_mgr->base.clks.dppclk_khz;
319 /* Both fclk and ref_dppclk run on the same scemi clock.
321 * such that max dppclk is 1:1 with ref_dppclk.
328 // Both fclk and ref_dppclk run on the same scemi clock.
329 clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz;

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