/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
amdgpu_display_rq_dlg_calc_20.c | 74 double ref_freq_to_pix_freq, 806 double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz; local in function:dml20_rq_dlg_get_dlg_params 919 ASSERT(ref_freq_to_pix_freq < 4.0); 921 disp_dlg_regs->ref_freq_to_pix_freq = 922 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); 923 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal 927 * (double) ref_freq_to_pix_freq); 955 dml_print("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", 957 ref_freq_to_pix_freq); 1376 ref_freq_to_pix_freq, [all...] |
amdgpu_display_rq_dlg_calc_20v2.c | 74 double ref_freq_to_pix_freq, 806 double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz; local in function:dml20v2_rq_dlg_get_dlg_params 919 ASSERT(ref_freq_to_pix_freq < 4.0); 921 disp_dlg_regs->ref_freq_to_pix_freq = 922 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); 923 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal 927 * (double) ref_freq_to_pix_freq); 956 dml_print("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", 958 ref_freq_to_pix_freq); 1377 ref_freq_to_pix_freq, [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
amdgpu_display_rq_dlg_calc_21.c | 51 double ref_freq_to_pix_freq, 852 double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz; local in function:dml_rq_dlg_get_dlg_params 965 ASSERT(ref_freq_to_pix_freq < 4.0); 967 disp_dlg_regs->ref_freq_to_pix_freq = 968 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); 969 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal 973 * (double) ref_freq_to_pix_freq); 1007 "DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", 1009 ref_freq_to_pix_freq); 1448 ref_freq_to_pix_freq, [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
amdgpu_dml1_display_rq_dlg_calc.c | 1009 double ref_freq_to_pix_freq; local in function:dml1_rq_dlg_get_dlg_params 1138 ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz; 1139 ASSERT(ref_freq_to_pix_freq < 4.0); 1140 disp_dlg_regs->ref_freq_to_pix_freq = 1141 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); 1142 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal 1145 * (double) ref_freq_to_pix_freq); 1178 "DLG: %s: ref_freq_to_pix_freq = %3.2f", 1180 ref_freq_to_pix_freq); 1431 disp_dlg_regs->refcyc_x_after_scaler = dst_x_after_scaler * ref_freq_to_pix_freq; /* in terms of refclk * [all...] |
amdgpu_display_rq_dlg_helpers.c | 237 "DML_RQ_DLG_CALC: ref_freq_to_pix_freq = 0x%0x\n", 238 dlg_regs.ref_freq_to_pix_freq);
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display_mode_structs.h | 431 unsigned int ref_freq_to_pix_freq; member in struct:_vcs_dpi_display_dlg_regs_st
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
amdgpu_dcn21_hubp.c | 469 REG_GET(REF_FREQ_TO_PIX_FREQ, 470 REF_FREQ_TO_PIX_FREQ, &dlg_attr.ref_freq_to_pix_freq); 490 if (dlg_attr.ref_freq_to_pix_freq != dml_dlg_attr->ref_freq_to_pix_freq) 491 DC_LOG_DEBUG("DML Validation | REF_FREQ_TO_PIX_FREQ:REF_FREQ_TO_PIX_FREQ - Expected: %u Actual: %u\n", 492 dml_dlg_attr->ref_freq_to_pix_freq, dlg_attr.ref_freq_to_pix_freq);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
amdgpu_dcn20_hubp.c | 106 REG_SET(REF_FREQ_TO_PIX_FREQ, 0, 107 REF_FREQ_TO_PIX_FREQ, dlg_attr->ref_freq_to_pix_freq); 1094 REG_GET(REF_FREQ_TO_PIX_FREQ, 1095 REF_FREQ_TO_PIX_FREQ, &dlg_attr->ref_freq_to_pix_freq); 1371 REG_GET(REF_FREQ_TO_PIX_FREQ, 1372 REF_FREQ_TO_PIX_FREQ, &dlg_attr.ref_freq_to_pix_freq); 1392 if (dlg_attr.ref_freq_to_pix_freq != dml_dlg_attr->ref_freq_to_pix_freq [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
amdgpu_dcn10_hw_sequencer_debug.c | 268 dlg_regs->dst_y_per_vm_flip, dlg_regs->dst_y_per_row_flip, dlg_regs->ref_freq_to_pix_freq,
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amdgpu_dcn10_hubp.c | 601 REG_SET(REF_FREQ_TO_PIX_FREQ, 0, 602 REF_FREQ_TO_PIX_FREQ, dlg_attr->ref_freq_to_pix_freq); 902 REG_GET(REF_FREQ_TO_PIX_FREQ, 903 REF_FREQ_TO_PIX_FREQ, &dlg_attr->ref_freq_to_pix_freq);
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amdgpu_dcn10_hw_sequencer.c | 235 dlg_regs->dst_y_per_vm_flip, dlg_regs->dst_y_per_row_flip, dlg_regs->ref_freq_to_pix_freq, 1735 "ref_freq_to_pix_freq: %d, \n" 1751 pipe_ctx->dlg_regs.ref_freq_to_pix_freq,
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