| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 460 REFCYC_H_BLANK_END, &dlg_attr.refcyc_h_blank_end,
472 if (dlg_attr.refcyc_h_blank_end != dml_dlg_attr->refcyc_h_blank_end)
473 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n",
474 dml_dlg_attr->refcyc_h_blank_end, dlg_attr.refcyc_h_blank_end);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 204 "DML_RQ_DLG_CALC: refcyc_h_blank_end = 0x%0x\n",
205 dlg_regs.refcyc_h_blank_end);
|
| display_mode_structs.h | 420 unsigned int refcyc_h_blank_end; member in struct:_vcs_dpi_display_dlg_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1144 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end
1146 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 93 REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end,
1068 REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end,
1362 REFCYC_H_BLANK_END, &dlg_attr.refcyc_h_blank_end,
1374 if (dlg_attr.refcyc_h_blank_end != dml_dlg_attr->refcyc_h_blank_end)
1375 DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n",
1376 dml_dlg_attr->refcyc_h_blank_end, dlg_attr.refcyc_h_blank_end)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 265 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
|
| amdgpu_dcn10_hubp.c | 588 REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end,
876 REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end,
|
| amdgpu_dcn10_hw_sequencer.c | 232 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
1726 "refcyc_h_blank_end: %d, \n"
1742 pipe_ctx->dlg_regs.refcyc_h_blank_end,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 926 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end
928 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
|
| amdgpu_display_rq_dlg_calc_20v2.c | 926 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end
928 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 972 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end
974 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13));
|
