| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 888 double refcyc_per_line_delivery_pre_c; local in function:dml20_rq_dlg_get_dlg_params
1189 refcyc_per_line_delivery_pre_c = 0.;
1249 refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(mode_lib,
1271 dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n",
1273 refcyc_per_line_delivery_pre_c);
1506 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1510 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13));
|
| amdgpu_display_rq_dlg_calc_20v2.c | 888 double refcyc_per_line_delivery_pre_c; local in function:dml20v2_rq_dlg_get_dlg_params
1190 refcyc_per_line_delivery_pre_c = 0.;
1250 refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(mode_lib,
1272 dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n",
1274 refcyc_per_line_delivery_pre_c);
1507 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1511 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 934 double refcyc_per_line_delivery_pre_c; local in function:dml_rq_dlg_get_dlg_params
1241 refcyc_per_line_delivery_pre_c = 0.;
1305 refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(
1330 "DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n",
1332 refcyc_per_line_delivery_pre_c);
1606 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
1607 refcyc_per_line_delivery_pre_c, 1);
1610 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int)dml_pow(2, 13));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 512 REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr.refcyc_per_line_delivery_pre_c);
569 if (dlg_attr.refcyc_per_line_delivery_pre_c != dml_dlg_attr->refcyc_per_line_delivery_pre_c)
570 DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_C - Expected: %u Actual: %u\n",
571 dml_dlg_attr->refcyc_per_line_delivery_pre_c, dlg_attr.refcyc_per_line_delivery_pre_c);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 297 "DML_RQ_DLG_CALC: refcyc_per_line_delivery_pre_c = 0x%0x\n",
298 dlg_regs.refcyc_per_line_delivery_pre_c);
|
| display_mode_structs.h | 451 unsigned int refcyc_per_line_delivery_pre_c; member in struct:_vcs_dpi_display_dlg_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 1102 double refcyc_per_line_delivery_pre_c; local in function:dml1_rq_dlg_get_dlg_params
1628 refcyc_per_line_delivery_pre_c = 0.;
1690 refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(
1711 "DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f",
1713 refcyc_per_line_delivery_pre_c);
1719 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
1720 refcyc_per_line_delivery_pre_c,
1725 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int) dml_pow(2, 13));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 280 REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c);
1120 REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c);
1414 REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr.refcyc_per_line_delivery_pre_c);
1471 if (dlg_attr.refcyc_per_line_delivery_pre_c != dml_dlg_attr->refcyc_per_line_delivery_pre_c)
1472 DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_C - Expected: %u Actual: %u\n",
1473 dml_dlg_attr->refcyc_per_line_delivery_pre_c, dlg_attr.refcyc_per_line_delivery_pre_c)
[all...] |
| amdgpu_dcn20_hwseq.c | 1275 old_dlg_attr.refcyc_per_line_delivery_pre_c != new_dlg_attr->refcyc_per_line_delivery_pre_c ||
1293 old_dlg_attr.refcyc_per_line_delivery_pre_c = new_dlg_attr->refcyc_per_line_delivery_pre_c;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 278 dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l,
|
| amdgpu_dcn10_hubp.c | 708 REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c);
928 REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c);
|
| amdgpu_dcn10_hw_sequencer.c | 245 dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l,
1771 "refcyc_per_line_delivery_pre_c: %d, \n"
1785 pipe_ctx->dlg_regs.refcyc_per_line_delivery_pre_c,
|
