| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 610 REFCYC_PER_REQ_DELIVERY_PRE, &ttu_attr.refcyc_per_req_delivery_pre_cur1);
649 if (ttu_attr.refcyc_per_req_delivery_pre_cur1 != dml_ttu_attr->refcyc_per_req_delivery_pre_cur1)
651 dml_ttu_attr->refcyc_per_req_delivery_pre_cur1, ttu_attr.refcyc_per_req_delivery_pre_cur1);
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 374 "DML_RQ_DLG_CALC: refcyc_per_req_delivery_pre_cur1 = 0x%0x\n",
375 ttu_regs.refcyc_per_req_delivery_pre_cur1);
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| display_mode_structs.h | 483 unsigned int refcyc_per_req_delivery_pre_cur1; member in struct:_vcs_dpi_display_ttu_regs_st
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 905 double refcyc_per_req_delivery_pre_cur1; local in function:dml20_rq_dlg_get_dlg_params
1385 refcyc_per_req_delivery_pre_cur1 = 0.0;
1389 &refcyc_per_req_delivery_pre_cur1,
1542 disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
1543 (unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
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| amdgpu_display_rq_dlg_calc_20v2.c | 905 double refcyc_per_req_delivery_pre_cur1; local in function:dml20v2_rq_dlg_get_dlg_params
1386 refcyc_per_req_delivery_pre_cur1 = 0.0;
1390 &refcyc_per_req_delivery_pre_cur1,
1543 disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
1544 (unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 951 double refcyc_per_req_delivery_pre_cur1; local in function:dml_rq_dlg_get_dlg_params
1457 refcyc_per_req_delivery_pre_cur1 = 0.0;
1462 &refcyc_per_req_delivery_pre_cur1,
1642 disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
1643 (unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 291 REFCYC_PER_REQ_DELIVERY_PRE, ttu_attr->refcyc_per_req_delivery_pre_cur1);
1512 REFCYC_PER_REQ_DELIVERY_PRE, &ttu_attr.refcyc_per_req_delivery_pre_cur1);
1551 if (ttu_attr.refcyc_per_req_delivery_pre_cur1 != dml_ttu_attr->refcyc_per_req_delivery_pre_cur1)
1553 dml_ttu_attr->refcyc_per_req_delivery_pre_cur1, ttu_attr.refcyc_per_req_delivery_pre_cur1);
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| amdgpu_dcn20_hwseq.c | 1279 old_ttu_attr.refcyc_per_req_delivery_pre_cur1 != new_ttu_attr->refcyc_per_req_delivery_pre_cur1 ||
1297 old_ttu_attr.refcyc_per_req_delivery_pre_cur1 = new_ttu_attr->refcyc_per_req_delivery_pre_cur1;
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 320 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
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| amdgpu_dcn10_hw_sequencer.c | 266 ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
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