| /src/sys/arch/hp300/dev/ |
| gboxreg.h | 54 #define tile_mover_waitbusy(regaddr) \
56 while (((volatile struct gboxfb *)(regaddr))->regs.sec_interrupt & 0x10) \
60 #define line_mover_waitbusy(regaddr) \
62 while ((((volatile struct gboxfb *)(regaddr))->status & 0x80) == 0) \
66 #define gbcm_waitbusy(regaddr) \
68 while (((volatile struct gboxfb *)(regaddr))->cmap_busy != 0xff) \
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| topcatreg.h | 42 #define tccm_waitbusy(regaddr) \
44 while (((volatile struct tcboxfb *)(regaddr))->cmap_busy & 0x04) \
48 #define tc_waitbusy(regaddr,planes) \
50 while (((volatile struct tcboxfb *)(regaddr))->busy & planes) \
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| dvboxreg.h | 43 #define db_waitbusy(regaddr) \
45 while (((volatile struct dvboxfb *)(regaddr))->wbusy != 0 || \
46 ((volatile struct dvboxfb *)(regaddr))->as_busy != 0) \
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| rboxreg.h | 46 #define rb_waitbusy(regaddr) \
48 while (((volatile struct rboxfb *)(regaddr))->wbusy & 0x01) \
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| diofbvar.h | 79 uint8_t *regaddr; /* control registers physaddr */ member in struct:diofb
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| diofb.c | 102 fb->regaddr = (uint8_t *)IIOP(fbr);
104 fb->regaddr = dio_scodetopa(scode);
116 if (fb->regaddr >= (uint8_t *)DIOII_BASE) {
119 * the offset from the select code base (regaddr)
124 fb->fbaddr = fb->regaddr + (uintptr_t)fb->fbaddr;
502 return m68k_btop(fb->regaddr + offset);
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| /src/sys/arch/hp300/stand/common/ |
| grf_gbreg.h | 54 #define tile_mover_waitbusy(regaddr) \
55 while (((struct gboxfb *)(regaddr))->sec_interrupt & 0x10)
57 #define line_mover_waitbusy(regaddr) \
58 while ((((struct gboxfb *)(regaddr))->status & 0x80) == 0)
60 #define gbcm_waitbusy(regaddr) \
61 while (((struct gboxfb *)(regaddr))->cmap_busy != 0xff)
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| grf_tcreg.h | 43 #define tccm_waitbusy(regaddr) \
44 while (((struct tcboxfb *)(regaddr))->cmap_busy & 0x04) DELAY(100)
46 #define tc_waitbusy(regaddr,planes) \
47 while (((struct tcboxfb *)(regaddr))->busy & planes) DELAY(100)
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| grf_rbreg.h | 47 #define rb_waitbusy(regaddr) \
48 while (((struct rboxfb *)(regaddr))->wbusy & 0x01) DELAY(100)
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| grf_dvreg.h | 47 #define db_waitbusy(regaddr) \
48 while (((struct dvboxfb *)(regaddr))->wbusy || \
49 ((struct dvboxfb *)(regaddr))->as_busy) DELAY(100)
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| /src/sys/arch/sparc64/sparc64/ |
| db_machdep.c | 51 char *regaddr = local in function:db_sparc_charop
56 *val = *regaddr;
59 *regaddr = *val;
75 short *regaddr = local in function:db_sparc_shortop
80 *val = *regaddr;
83 *regaddr = *val;
99 int *regaddr = local in function:db_sparc_intop
104 *val = *regaddr;
107 *regaddr = *val;
122 db_expr_t *regaddr local in function:db_sparc_regop
[all...] |
| /src/sys/arch/sparc/sparc/ |
| db_machdep.c | 104 db_expr_t *regaddr = local in function:db_sparc_regop
109 *val = *regaddr;
112 *regaddr = *val;
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| /src/sys/dev/ic/ |
| mcp23xxxgpio.c | 135 uint8_t regaddr = mcpgpio_regaddr(sc, bank, reg); local in function:mcpgpio__read
137 error = sc->sc_accessops->read(sc, bank, regaddr, valp);
142 regaddr, error);
155 uint8_t regaddr = mcpgpio_regaddr(sc, bank, reg); local in function:mcpgpio__write
157 error = sc->sc_accessops->write(sc, bank, regaddr, val);
162 regaddr, error);
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| /src/sys/arch/amiga/dev/ |
| if_ed_zbus.c | 110 bus_addr_t memaddr, promaddr, regaddr; local in function:ed_zbus_attach
117 regaddr = HYDRA_REGADDR;
121 regaddr = ASDG_REGADDR;
130 if (bus_space_map(sc->sc_regt, regaddr, 0x20, 0, &sc->sc_regh)) {
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| /src/sys/arch/x86/x86/ |
| db_trace.c | 58 db_expr_t *regaddr = local in function:db_x86_regop
63 *val = *regaddr;
66 *regaddr = *val;
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| /src/sys/arch/shark/ofw/ |
| vlpci.c | 138 int regaddr = VLPCI_PCI_WND_HIADDR_REG(num); local in function:vlpci_dump_window
142 addr = regread_1(sc, regaddr) << 24;
143 addr |= regread_1(sc, regaddr + 1) << 16;
144 attr = regread_1(sc, regaddr + 2);
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| /src/sys/arch/vax/vsa/ |
| lcg.c | 88 #define LCG_REG(reg) regaddr[(reg / 4)]
156 static volatile long *regaddr; variable in typeref:typename:volatile long *
1003 if (regaddr != NULL)
1008 regaddr = (long*)vax_map_physmem(LCG_REG_ADDR, (LCG_REG_SIZE/VAX_NBPG));
1009 if (regaddr == 0) {
1015 regaddr = (long*)virtual_avail;
1017 ioaccess((vaddr_t)regaddr, LCG_REG_ADDR, (LCG_REG_SIZE/VAX_NBPG));
1148 if (regaddr == 0) {
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| spx.c | 109 #define SPX_REG(reg) regaddr[(reg - 0x2000) / 4]
110 #define SPXg_REG(reg) regaddr[(reg - 0x2000) / 2]
256 static volatile long *regaddr; variable in typeref:typename:volatile long *
1237 regaddr = (long*)virtual_avail;
1239 ioaccess((vaddr_t)regaddr, raddr, rsize/VAX_NBPG);
1248 regaddr = (long*)vax_map_physmem(raddr, rsize/VAX_NBPG);
1249 if (regaddr == 0) {
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| /src/sys/dev/pci/qat/ |
| qat_ae.c | 424 u_short mask, regaddr; local in function:qat_aereg_rel_data_read
450 if ((regaddr = qat_aereg_get_10bit_addr(regtype, relreg)) ==
459 inst = 0xA070000000ull | (regaddr & 0x3ff);
462 inst = (0xA030000000ull | ((regaddr & 0x3ff) << 10));
3099 enum aereg_type regtype, u_short regaddr, u_int value)
3119 regaddr, value);
3131 regaddr, value);
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| /src/sys/dev/pci/igc/ |
| if_igc.c | 1123 bus_size_t regaddr = igc_mac_counters[cnt].reg; local in function:igc_update_counters
1125 val = igc_read_mac_counter(hw, regaddr,
1129 if (regaddr == IGC_MPC)
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