| /src/sys/arch/hp300/stand/common/ |
| ite_gb.c | 57 struct gboxfb *regbase = (void *)ip->regbase; local in function:gbox_init
61 regbase->write_protect = 0x0;
62 regbase->interrupt = 0x4;
63 regbase->rep_rule = RR_COPY;
64 regbase->blink1 = 0xff;
65 regbase->blink2 = 0xff;
66 regbase->sec_interrupt = 0x01;
73 regbase->creg_select = 0x00;
74 regbase->cmap_red = 0x00
115 struct gboxfb *regbase = (void *)ip->regbase; local in function:gbox_scroll
127 struct gboxfb *regbase = (void *)ip->regbase; local in function:gbox_windowmove
[all...] |
| ite_tc.c | 58 struct tcboxfb *regbase = (void *)ip->regbase; local in function:topcat_init
66 if (regbase->fbid != GID_TOPCAT) {
67 while ((regbase->catseye_status & 1))
69 regbase->catseye_status = 0x0;
70 regbase->vb_select = 0x0;
71 regbase->tcntrl = 0x0;
72 regbase->acntrl = 0x0;
73 regbase->pncntrl = 0x0;
74 regbase->rug_cmdstat = 0x90
[all...] |
| ite_dv.c | 58 struct dvboxfb *regbase; local in function:dvbox_init
62 regbase = (void *)ip->regbase;
63 dv_reset(regbase);
72 regbase->interrupt = 0x04;
73 regbase->drive = 0x10;
74 regbase->rep_rule = RR_COPY << 4 | RR_COPY;
75 regbase->opwen = 0x01;
76 regbase->fbwen = 0x0;
77 regbase->fold = 0x01
[all...] |
| ite_rb.c | 57 struct rboxfb *regbase = (void *)ip->regbase; local in function:rbox_init
62 rb_waitbusy(regbase);
65 regbase->interrupt = 0x04;
66 regbase->display_enable = 0x01;
67 regbase->video_enable = 0x01;
68 regbase->drive = 0x01;
69 regbase->vdrive = 0x0;
73 regbase->opwen = 0xFF;
79 rb_waitbusy(regbase);
[all...] |
| grf_rbreg.h | 50 #define CM1RED ((struct rencm *)((char *)ip->regbase + 0x6400))
51 #define CM1GRN ((struct rencm *)((char *)ip->regbase + 0x6800))
52 #define CM1BLU ((struct rencm *)((char *)ip->regbase + 0x6C00))
53 #define CM2RED ((struct rencm *)((char *)ip->regbase + 0x7400))
54 #define CM2GRN ((struct rencm *)((char *)ip->regbase + 0x7800))
55 #define CM2BLU ((struct rencm *)((char *)ip->regbase + 0x7C00))
|
| ite_hy.c | 55 struct hyboxfb *regbase = (void *)ip->regbase; local in function:hyper_init
64 regbase->nblank = 0x05;
|
| itevar.h | 46 *(((u_char *)(ip)->regbase) + (offset))
60 void *regbase, *fbbase; member in struct:ite_data
|
| ite.c | 224 ip->regbase = (void *)fb;
226 ip->fbbase = (void *)(*((uint8_t *)ip->regbase + fboff) << 16);
229 ip->fbbase = (uint8_t *)ip->fbbase + (int)ip->regbase;
287 ip->regbase = (uint8_t *)(INTIOBASE + FB_BASE);
330 if ((int)ip->regbase == INTIOBASE + FB_BASE) {
|
| ite_subr.c | 91 (uint8_t *)ip->regbase) + FONTDATA;
|
| /src/sys/arch/arm/ti/ |
| am3_prcm.c | 211 bus_addr_t regbase; local in function:am3_prcm_clock_decode
229 if (fdtbus_get_reg(cc_phandle, 0, ®base, NULL) != 0)
231 regoff += (regbase - sc->sc_regbase);
|
| /src/sys/arch/macppc/dev/ |
| kauai.c | 112 paddr_t regbase, dmabase; local in function:kauai_attach
130 regbase = reg[2] + 0x2000;
171 if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS << 4, 0,
|
| /src/sys/arch/arm/marvell/ |
| mvsoc.c | 82 static vaddr_t regbase = 0xffffffff, dsc_base, pex_base; variable in typeref:typename:vaddr_t
1047 sc->sc_addr = vtophys(regbase);
1173 regbase = iobase;
1196 KASSERT(regbase != 0xffffffff);
1203 reg = le32toh(*(volatile uint32_t *)(regbase + ORION_PMI_BASE +
1211 reg = le32toh(*(volatile uint32_t *)(regbase +
1227 KASSERT(regbase != 0xffffffff);
1242 KASSERT(regbase != 0xffffffff);
1405 val = le32toh(*(volatile uint32_t *)(regbase + MVSOC_AXI_MMAP1(cs)));
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| nuvoton-npcm750-runbmc-olympus.dts | 76 regbase = <0xf0010000 0x1000>;
82 regbase = <0xf0010000 0x1000>;
88 regbase = <0xf0010000 0x1000>;
93 regbase = <0xf0010000 0x1000>;
|
| /src/sys/arch/arm/xscale/ |
| ixp425_if_npe.c | 141 uint32_t regbase; member in struct:__anon92b0dbf30108
154 .regbase = IXP425_MAC_A_HWBASE,
167 .regbase = IXP425_MAC_B_HWBASE,
533 if (bus_space_map(sc->sc_iot, npeconfig[unit].regbase,
536 npeconfig[unit].regbase, npeconfig[unit].regsize);
540 if (npeconfig[unit].miibase != npeconfig[unit].regbase) {
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| interrupt.c | 442 #define DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(regname, regbase) \
445 .reg_base = (regbase), \
|
| /src/sys/dev/pci/ |
| if_bge.c | 635 uint32_t bit, regbase; local in function:bge_ape_lock_init
639 regbase = BGE_APE_LOCK_GRANT;
641 regbase = BGE_APE_PER_LOCK_GRANT;
658 APE_WRITE_4(sc, regbase + 4 * i, bit);
|
| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_dp_mst_topology.c | 2673 int regbase = up ? DP_SIDEBAND_MSG_UP_REP_BASE : DP_SIDEBAND_MSG_DOWN_REQ_BASE; local in function:drm_dp_send_sideband_msg
2683 ret = drm_dp_dpcd_write(mgr->aux, regbase + offset,
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