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    Searched refs:region_end (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/
sanitizer_persistent_allocator.h 32 atomic_uintptr_t region_end; member in class:__sanitizer::PersistentAllocator
39 uptr end = atomic_load(&region_end, memory_order_acquire);
60 atomic_store(&region_end, mem + allocsz, memory_order_release);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_cm_common.c 114 reg_region_cur <= reg->region_end;
325 int32_t region_start, region_end; local in function:cm_helper_translate_curve_to_hw_format
349 region_end = NUMBER_REGIONS - MAX_LOW_POINT;
368 region_end = 1;
371 for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++)
380 for (k = 0; k < (region_end - region_start); k++) {
396 start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS;
412 dc_fixpt_from_int(region_end));
512 int32_t region_start, region_end; local in function:cm_helper_translate_curve_to_degamma_hw_format
529 region_end = 0
    [all...]
dcn10_cm_common.h 57 uint32_t region_end
amdgpu_dcn10_dpp_cm.c 391 gam_regs.region_end = REG(CM_RGAM_RAMA_REGION_32_33);
420 gam_regs.region_end = REG(CM_RGAM_RAMB_REGION_32_33);
544 gam_regs.region_end = REG(CM_DGAM_RAMB_REGION_14_15);
573 gam_regs.region_end = REG(CM_DGAM_RAMA_REGION_14_15);
  /src/sys/external/bsd/compiler_rt/dist/lib/lsan/
lsan_common.h 130 uptr region_begin, uptr region_end, bool is_readable);
lsan_common.cc 313 uptr region_begin, uptr region_end, bool is_readable) {
315 uptr intersection_end = Min(region_end, root_region.begin + root_region.size);
319 region_begin, region_end,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_mpc.c 349 gam_regs.region_end = REG(MPCC_OGAM_RAMB_REGION_32_33[mpcc_id]);
376 gam_regs.region_end = REG(MPCC_OGAM_RAMA_REGION_32_33[mpcc_id]);
amdgpu_dcn20_dpp_cm.c 413 gam_regs.region_end = REG(CM_BLNDGAM_RAMA_REGION_32_33);
441 gam_regs.region_end = REG(CM_BLNDGAM_RAMB_REGION_32_33);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_hw_sequencer.c 447 int32_t region_start, region_end; local in function:dce110_translate_regamma_to_hw_format
464 region_end = region_start + NUMBER_REGIONS;
477 region_end = 1;
503 for (k = 0; k < (region_end - region_start); k++) {
519 start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS;
527 dc_fixpt_from_int(region_end));

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