| /src/external/ibm-public/postfix/dist/src/dns/ |
| dns_rr_eq_sa.c | 110 struct addrinfo **resv; local
135 resv = (struct addrinfo **) mymalloc(len * sizeof(*resv));
137 resv[len++] = res;
138 qsort((void *) resv, len, sizeof(*resv), compare_family);
140 SOCKADDR_TO_HOSTADDR(resv[n]->ai_addr, resv[n]->ai_addrlen,
144 dns_rr_eq_sa(rr, resv[n]->ai_addr) ?
147 DNS_RR_EQ_SA(rr, resv[n]->ai_addr)
[all...] |
| dns_sa_to_rr.c | 105 struct addrinfo **resv; local
121 resv = (struct addrinfo **) mymalloc(len * sizeof(*resv));
123 resv[len++] = res;
124 qsort((void *) resv, len, sizeof(*resv), compare_family);
126 if ((rr = dns_sa_to_rr(argv[0], DNS_RR_NOPREF, resv[n]->ai_addr)) == 0)
135 myfree((void *) resv);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_wait.c | 39 i915_gem_object_wait_reservation(struct dma_resv *resv,
51 ret = dma_resv_get_fences_rcu(resv,
80 excl = dma_resv_get_excl_rcu(resv);
92 if (prune_fences && dma_resv_trylock(resv)) {
93 if (dma_resv_test_signaled_rcu(resv, true))
94 dma_resv_add_excl_fence(resv, NULL);
95 dma_resv_unlock(resv);
159 ret = dma_resv_get_fences_rcu(obj->base.resv,
171 excl = dma_resv_get_excl_rcu(obj->base.resv);
195 timeout = i915_gem_object_wait_reservation(obj->base.resv,
[all...] |
| i915_gem_busy.c | 113 * !dma_resv_test_signaled_rcu(obj->resv, true);
118 seq = raw_read_seqcount(&obj->base.resv->seq);
122 busy_check_writer(rcu_dereference(obj->base.resv->fence_excl));
125 list = rcu_dereference(obj->base.resv->fence);
133 if (read_seqcount_retry(&obj->base.resv->seq, seq))
139 if (args->busy && read_seqcount_retry(&obj->base.resv->seq, seq))
|
| i915_gem_clflush.c | 115 obj->base.resv, NULL, true,
118 dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
|
| i915_gem_fence.c | 83 obj->base.resv, NULL,
88 dma_resv_add_excl_fence(obj->base.resv, &stub->dma);
|
| /src/sys/external/bsd/drm2/dist/drm/vgem/ |
| vgem_fence.c | 29 #include <linux/dma-resv.h>
136 struct dma_resv *resv; local
158 resv = obj->resv;
159 if (!dma_resv_test_signaled_rcu(resv,
167 dma_resv_lock(resv, NULL);
169 dma_resv_add_excl_fence(resv, fence);
170 else if ((ret = dma_resv_reserve_shared(resv, 1)) == 0)
171 dma_resv_add_shared_fence(resv, fence);
172 dma_resv_unlock(resv);
[all...] |
| /src/external/gpl3/gcc/dist/libgcc/soft-fp/ |
| fixtdbitint.c | 44 UBILtype *pow10v, *resv; local
171 resv = __builtin_alloca ((res_limbs + mant_limbs) * sizeof (UBILtype));
174 resv[res_limbs] = mantissalo;
177 resv[res_limbs + BITINT_END (1, 0)] = mantissalo;
178 resv[res_limbs + BITINT_END (0, 1)] = mantissahi;
181 resv[res_limbs + BITINT_END (mant_limbs - 1, 0)] = mantissalo;
184 resv[res_limbs + BITINT_END (mant_limbs - 2, 1)] = mantissalo >> 32;
187 resv[res_limbs + BITINT_END (mant_limbs - 3, 2)] = mantissahi;
189 resv[res_limbs + BITINT_END (0, 3)] = mantissahi >> 32;
193 __mulbitint3 (resv, exp_bits + mant_bits - low_zeros * BIL_TYPE_SIZE
[all...] |
| fixddbitint.c | 44 UBILtype *pow10v, *resv; local
144 resv = __builtin_alloca ((res_limbs + mant_limbs) * sizeof (UBILtype));
146 resv[res_limbs] = mantissa;
149 resv[res_limbs] = mantissa;
152 resv[res_limbs + BITINT_END (1, 0)] = mantissa;
153 resv[res_limbs + BITINT_END (0, 1)] = mantissa >> 32;
156 __mulbitint3 (resv, exp_bits + mant_bits - low_zeros * BIL_TYPE_SIZE,
157 resv + res_limbs, mant_bits,
162 if (res_limbs + low_zeros > rn && resv[BITINT_END (0, res_limbs - 1)])
165 && (resv[BITINT_END (rn - res_limbs, rn - 1) - low_zeros
[all...] |
| fixsdbitint.c | 44 UBILtype *pow10v, *resv; local
145 resv = __builtin_alloca ((res_limbs + mant_limbs) * sizeof (UBILtype));
146 resv[res_limbs] = mantissa;
147 __mulbitint3 (resv, exp_bits + mant_bits - low_zeros * BIL_TYPE_SIZE,
148 resv + res_limbs, mant_bits,
153 if (res_limbs + low_zeros > rn && resv[BITINT_END (0, res_limbs - 1)])
156 && (resv[BITINT_END (rn - res_limbs, rn - 1) - low_zeros]
168 resv + BITINT_END (res_limbs - 1, 0), min_limbs);
171 resv + BITINT_END (res_limbs - min_limbs, 0),
|
| /src/sys/external/bsd/drm2/dist/drm/ttm/ |
| ttm_execbuf_util.c | 47 dma_resv_unlock(bo->base.resv);
64 dma_resv_unlock(bo->base.resv);
114 ret = dma_resv_reserve_shared(bo->base.resv,
128 ret = dma_resv_lock_slow_interruptible(bo->base.resv,
131 dma_resv_lock_slow(bo->base.resv, ticket);
137 ret = dma_resv_reserve_shared(bo->base.resv,
175 dma_resv_add_shared_fence(bo->base.resv, fence);
177 dma_resv_add_excl_fence(bo->base.resv, fence);
179 dma_resv_unlock(bo->base.resv);
|
| ttm_bo.c | 56 #include <linux/dma-resv.h>
200 dma_resv_assert_held(bo->base.resv);
256 dma_resv_assert_held(bo->base.resv);
289 dma_resv_assert_held(pos->first->base.resv);
290 dma_resv_assert_held(pos->last->base.resv);
304 dma_resv_assert_held(pos->first->base.resv);
305 dma_resv_assert_held(pos->last->base.resv);
319 dma_resv_assert_held(pos->first->base.resv);
320 dma_resv_assert_held(pos->last->base.resv);
451 if (bo->base.resv == &bo->base._resv
556 struct dma_resv *resv; local
[all...] |
| /src/sys/external/bsd/drm2/linux/ |
| linux_dma_buf.c | 44 #include <linux/dma-resv.h>
74 if (info->resv == NULL) {
84 dmabuf->resv = info->resv;
90 if (dmabuf->resv == NULL) {
91 dmabuf->resv = &dmabuf->db_resv_int[0];
92 dma_resv_init(dmabuf->resv);
173 if (dmabuf->resv == &dmabuf->db_resv_int[0]) {
174 dma_resv_fini(dmabuf->resv);
235 dma_resv_lock(attach->dmabuf->resv, NULL)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_prime.c | 71 struct dma_resv *resv = attach->dmabuf->resv; local
76 dma_resv_lock(resv, NULL);
78 RADEON_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
79 dma_resv_unlock(resv);
|
| radeon_benchmark.c | 43 struct dma_resv *resv)
56 resv);
61 resv);
130 dobj->tbo.base.resv);
141 dobj->tbo.base.resv);
|
| radeon_sync.c | 88 * @resv: reservation object with embedded fence
95 struct dma_resv *resv,
105 f = dma_resv_get_excl(resv);
112 flist = dma_resv_get_list(resv);
118 dma_resv_held(resv));
|
| radeon_rv770_dma.c | 41 * @resv: reservation object to sync to
50 struct dma_resv *resv)
71 radeon_sync_resv(rdev, &sync, resv, false);
|
| /src/sys/external/bsd/drm2/include/linux/ |
| dma-buf.h | 41 #include <linux/dma-resv.h>
78 struct dma_resv *resv; member in struct:dma_buf
101 struct dma_resv *resv; member in struct:dma_buf_export_info
|
| /src/sys/arch/amiga/amiga/ |
| cfdev.h | 43 u_long resv; member in struct:expanrom
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_engine_pool.c | 51 struct dma_resv *resv = node->obj->base.resv; local
54 if (dma_resv_trylock(resv)) {
55 dma_resv_add_excl_fence(resv, NULL);
56 dma_resv_unlock(resv);
|
| /src/sys/external/bsd/drm2/dist/include/drm/ttm/ |
| ttm_bo_driver.h | 40 #include <linux/dma-resv.h>
691 success = dma_resv_trylock(bo->base.resv);
696 ret = dma_resv_lock_interruptible(bo->base.resv, ticket);
698 ret = dma_resv_lock(bo->base.resv, ticket);
776 ret = dma_resv_lock_slow_interruptible(bo->base.resv,
779 dma_resv_lock_slow(bo->base.resv, ticket);
799 dma_resv_unlock(bo->base.resv);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_ttm.h | 104 struct dma_resv *resv,
111 struct dma_resv *resv,
115 struct dma_resv *resv,
|
| amdgpu_object.c | 260 bp.resv = NULL;
526 .resv = bp->resv,
587 NULL, bp->resv, &amdgpu_bo_destroy);
603 r = amdgpu_fill_buffer(bo, 0, bo->tbo.base.resv, &fence);
612 if (!bp->resv)
625 if (!bp->resv)
626 dma_resv_unlock(bo->tbo.base.resv);
647 bp.resv = bo->tbo.base.resv;
1414 struct dma_resv *resv = bo->tbo.base.resv; local
[all...] |
| amdgpu_sync.h | 50 struct dma_resv *resv,
|
| amdgpu_dma_buf.c | 221 r = __dma_resv_make_exclusive(bo->tbo.base.resv);
414 struct dma_resv *resv = dma_buf->resv; local
426 bp.resv = resv;
427 dma_resv_lock(resv, NULL);
437 dma_resv_unlock(resv);
441 dma_resv_unlock(resv);
|
