| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_hubp.c | 150 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size,
151 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size,
152 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size,
153 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size,
154 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size,
155 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height,
156 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear);
386 CHUNK_SIZE_C, &rq_regs.rq_regs_c.chunk_size,
387 MIN_CHUNK_SIZE_C, &rq_regs.rq_regs_c.min_chunk_size,
388 META_CHUNK_SIZE_C, &rq_regs.rq_regs_c.meta_chunk_size
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 220 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size,
221 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size,
222 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size,
223 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size,
224 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size,
225 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size,
226 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height,
227 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear);
1243 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size,
1244 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 222 rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_chunk_size,
223 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size,
224 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size,
225 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear);
|
| amdgpu_dcn10_hubp.c | 568 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size,
569 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size,
570 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size,
571 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size,
572 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size,
573 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size,
574 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height,
575 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear);
1051 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size,
1052 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size
[all...] |
| amdgpu_dcn10_hw_sequencer.c | 210 rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_chunk_size,
211 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size,
212 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size,
213 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_display_rq_dlg_helpers.c | 190 print__data_rq_regs_st(mode_lib, rq_regs.rq_regs_c);
|
| display_mode_structs.h | 507 display_data_rq_regs_st rq_regs_c; member in struct:_vcs_dpi_display_rq_regs_st
|
| amdgpu_dml1_display_rq_dlg_calc.c | 246 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c);
249 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 207 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c);
208 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height),
213 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
|
| amdgpu_display_rq_dlg_calc_20v2.c | 207 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c);
208 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height),
213 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 186 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c);
187 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(
193 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
|
