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    Searched refs:rsp0 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/x86/x86/
svs.c 112 * RSP (it does not use the TSS.rsp0 mechanism described below).
117 * two user LWPs, the kernel updates TSS.rsp0 (which is per-cpu) to point to
120 * interrupt. There, the CPU will automatically read TSS.rsp0 and use it as a
124 * TSS.rsp0 is used by the CPU only during ring3->ring0 transitions. Therefore,
126 * read TSS.rsp0. Instead, it just uses the current stack.
131 * has a two-page rsp0 entry (pcpuarea->ent[cid].rsp0). These two pages do
162 * | | pcpuarea->ent[cid].rsp0 (page 0) | | |
164 * | | pcpuarea->ent[cid].rsp0 (page 1) | ----+
168 * After svs_lwp_switch() gets called, we set pcpuarea->ent[cid].rsp0 (page 1
322 vaddr_t rsp0; member in struct:svs_utls
419 vaddr_t va, rsp0; local
649 uintptr_t rsp0; local
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  /src/sys/arch/x86/include/
pmap_private.h 124 uint8_t rsp0[2 * PAGE_SIZE]; member in struct:pcpu_entry

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