| /src/sys/dev/fdt/ |
| fdt_reset.c | 84 struct fdtbus_reset *rst = NULL; local
114 rst = kmem_alloc(sizeof(*rst), KM_SLEEP);
115 rst->rst_rc = rc;
116 rst->rst_priv = rst_priv;
128 return rst;
145 fdtbus_reset_put(struct fdtbus_reset *rst)
147 struct fdtbus_reset_controller *rc = rst->rst_rc;
149 rc->rc_funcs->release(rc->rc_dev, rst->rst_priv);
150 kmem_free(rst, sizeof(*rst))
[all...] |
| dwcwdt_fdt.c | 64 struct fdtbus_reset *rst; local
79 rst = fdtbus_reset_get_index(phandle, 0);
80 if (rst && fdtbus_reset_assert(rst) != 0) {
84 if (rst && fdtbus_reset_deassert(rst) != 0) {
|
| ahcisata_fdt.c | 64 struct fdtbus_reset *rst; local
97 for (i = 0; (rst = fdtbus_reset_get_index(phandle, i)) != NULL; i++)
98 if (fdtbus_reset_deassert(rst) != 0) {
|
| dwiic_fdt.c | 107 struct fdtbus_reset *rst = fdtbus_reset_get_index(phandle, 0); local
108 if (rst != NULL) {
109 if (fdtbus_reset_deassert(rst) != 0) {
|
| ehci_fdt.c | 74 struct fdtbus_reset *rst; local
96 for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++)
97 if (fdtbus_reset_deassert(rst) != 0) {
|
| ohci_fdt.c | 74 struct fdtbus_reset *rst; local
96 for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++)
97 if (fdtbus_reset_deassert(rst) != 0) {
|
| /src/sys/arch/arm/sunxi/ |
| sun9i_a80_mmcclk.c | 83 struct fdtbus_reset *rst; local
101 rst = fdtbus_reset_get(phandle, "ahb");
102 if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
|
| sunxi_de2_ccu.c | 129 struct fdtbus_reset *rst; local
152 rst = fdtbus_reset_get_index(phandle, 0);
153 if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
|
| sunxi_twi.c | 131 struct fdtbus_reset *rst; local
158 if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL)
159 if (fdtbus_reset_deassert(rst) != 0) {
|
| sunxi_dwhdmi.c | 234 struct fdtbus_reset *rst; local
296 rst = fdtbus_reset_get(phandle, "ctrl");
297 if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
|
| /src/sys/arch/atari/stand/libsa/ |
| diskio.c | 37 typedef struct { rdsec_f rds; u_int rst; u_int rend; } bdevd_t; member in struct:__anon1220
70 bootdev.rst = pd->p_offset;
93 daddr_t stb = dd->rst + dblk;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
| tegra.h | 15 struct reset_control *rst; member in struct:nvkm_device_tegra
|
| /src/sys/arch/arm/rockchip/ |
| rk3399_pcie_phy.c | 78 struct fdtbus_reset *rst; local
80 rst = fdtbus_reset_get(phandle, name);
81 fdtbus_reset_assert(rst);
82 fdtbus_reset_put(rst);
88 struct fdtbus_reset *rst; local
90 rst = fdtbus_reset_get(phandle, name);
91 fdtbus_reset_deassert(rst);
92 fdtbus_reset_put(rst);
|
| rk3288_usb.c | 155 struct fdtbus_reset *rst; local
169 rst = fdtbus_reset_get(phandle, "phy-reset");
170 if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
|
| rk3399_pcie.c | 185 struct fdtbus_reset *rst; local
187 rst = fdtbus_reset_get(phandle, name);
188 fdtbus_reset_assert(rst);
189 fdtbus_reset_put(rst);
195 struct fdtbus_reset *rst; local
197 rst = fdtbus_reset_get(phandle, name);
198 fdtbus_reset_deassert(rst);
199 fdtbus_reset_put(rst);
|
| /src/sys/arch/evbmips/rasoc/ |
| autoconf.c | 107 const uint32_t rst = bus_space_read_4(bst, ra_sysctl_bsh, local
109 if ((rst & map->map_rst) != 0) {
111 rst & ~map->map_rst);
|
| /src/sys/arch/arm/amlogic/ |
| mesongxl_usb3phy.c | 161 struct fdtbus_reset *rst; local
192 for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++) {
193 if (fdtbus_reset_deassert(rst) != 0) {
|
| /src/sys/arch/arm/ti/ |
| ti_ehci.c | 76 struct fdtbus_reset *rst; local
98 for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++)
99 if (fdtbus_reset_deassert(rst) != 0) {
|
| /src/sys/arch/riscv/starfive/ |
| jh71x0_eth.c | 141 struct fdtbus_reset *rst; local
142 for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++) {
143 if (fdtbus_reset_deassert(rst) != 0) {
|
| jh71x0_temp.c | 157 struct fdtbus_reset * rst = fdtbus_reset_get(phandle, cr); local
158 if (rst == NULL) {
162 error = fdtbus_reset_deassert(rst);
|
| /src/sys/arch/evbarm/gumstix/ |
| gxio.c | 463 int rst = (CPU_IS_PXA250) ? 80 : 32; local
467 const int rst = 32, irq = 99; local
469 const int rst = 80, irq = 36; local
476 pxa2x0_gpio_set_function(rst, GPIO_OUT | GPIO_SET); /* RESET 1 */
478 pxa2x0_gpio_set_function(rst, GPIO_OUT | GPIO_CLR);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/ |
| nouveau_nvkm_engine_device_tegra.c | 61 reset_control_assert(tdev->rst);
69 reset_control_deassert(tdev->rst);
315 tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
316 if (IS_ERR(tdev->rst)) {
317 ret = PTR_ERR(tdev->rst);
|
| /src/sys/arch/arm/nvidia/ |
| tegra_xusb.c | 217 struct fdtbus_reset *rst; local
391 rst = fdtbus_reset_get(faa->faa_phandle, "xusb_host");
392 fdtbus_reset_deassert(rst);
394 rst = fdtbus_reset_get(faa->faa_phandle, "xusb_src");
395 fdtbus_reset_deassert(rst);
397 rst = fdtbus_reset_get(faa->faa_phandle, "xusb_ss");
398 fdtbus_reset_deassert(rst);
429 struct fdtbus_reset *rst; local
458 rst = fdtbus_reset_get(psc->sc_phandle, "xusb_host");
459 fdtbus_reset_deassert(rst);
[all...] |
| tegra124_car.c | 1532 struct tegra124_car_rst *rst; local
1544 rst = kmem_alloc(sizeof(*rst), KM_SLEEP);
1545 rst->set_reg = tegra124_car_reset_regs[reg].set_reg;
1546 rst->clr_reg = tegra124_car_reset_regs[reg].clr_reg;
1547 rst->mask = __BIT(reset_id % 32);
1549 return rst;
1555 struct tegra124_car_rst *rst = priv; local
1557 kmem_free(rst, sizeof(*rst));
1564 struct tegra124_car_rst *rst = priv; local
1575 struct tegra124_car_rst *rst = priv; local
[all...] |
| /src/sys/dev/sbus/ |
| qe.c | 698 int r = 0, rst = 0; local
718 rst = 1;
726 rst = 1;
733 rst = 1;
754 rst = 1;
761 rst = 1;
768 rst = 1;
775 rst = 1;
828 rst = 1;
835 rst = 1
[all...] |
