| /src/sys/arch/arm/imx/ |
| imxpwm.c | 88 uint32_t cr, sar, pr; local
91 sar = PWM_READ(sc, PWM_SAR);
98 const u_int act_cycles = __SHIFTOUT(sar, PWM_SAR_SAMPLE);
111 uint32_t cr, sar, pr; local
133 sar = __SHIFTIN(act_cycles, PWM_PR_PERIOD);
135 PWM_WRITE(sc, PWM_SAR, sar);
|
| /src/tests/kernel/arch/hppa/ |
| execregs.c | 169 long sar = nonnull(0x8a); /* cr11 */ local
222 __asm volatile("mtctl %[sar], %%sar" /* cr11 */
224 : [sar] "r"(sar)
277 long sar = nonnull(0x8a); /* cr11 */ local
344 __asm volatile("mtctl %[sar], %%sar" /* cr11 */
346 : [sar] "r"(sar)
[all...] |
| h_execregs.S | 59 stw %sar, (4*(3 - NEXECREGS))(%sp)
|
| /src/sys/arch/arm/marvell/ |
| armadaxp.c | 64 #define EXTRACT_XP_CPU_FREQ_FIELD(sar) (((0x01 & (sar >> 52)) << 3) | \
65 (0x07 & (sar >> 21)))
66 #define EXTRACT_XP_FAB_FREQ_FIELD(sar) (((0x01 & (sar >> 51)) << 4) | \
67 (0x0F & (sar >> 24)))
68 #define EXTRACT_370_CPU_FREQ_FIELD(sar) ((sar >> 11) & 0xf)
69 #define EXTRACT_370_FAB_FREQ_FIELD(sar) ((sar >> 15) & 0x1f
842 uint32_t sar; local
[all...] |
| /src/common/lib/libc/arch/x86_64/string/ |
| strchr.S | 132 sar %cl,%r10 /* top bytes 0xff */
|
| /src/sys/arch/hppa/hppa/ |
| trap.S | 421 mtctl %t1, %sar
2071 mfctl %sar, %t1 /* use ,bc each cache line */
|
| /src/sys/lib/libkern/arch/hppa/ |
| milli.S | 189 sar: .equ 11 ; Shift Amount Register label
|
