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  /src/sys/dev/pci/
if_ste.c 155 uint16_t sc_IntEnable; /* prototype IntEnable register */
901 if ((isr & sc->sc_IntEnable) == 0)
972 sc->sc_IntEnable);
1358 sc->sc_IntEnable = IE_HostError | IE_TxComplete | IE_UpdateStats |
1362 bus_space_write_2(st, sh, STE_IntEnable, sc->sc_IntEnable);
if_stge.c 202 uint16_t sc_IntEnable; /* prototype IntEnable register */
1094 if ((isr & sc->sc_IntEnable) == 0)
1161 CSR_WRITE_2(sc, STGE_IntEnable, sc->sc_IntEnable);
1623 sc->sc_IntEnable = IS_HostError | IS_TxComplete | IS_UpdateStats |
1626 CSR_WRITE_2(sc, STGE_IntEnable, sc->sc_IntEnable);

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