/src/sys/dev/qbus/ |
dz_uba.c | 115 sc->sc_dr.dr_csr = DZ_UBA_CSR; 116 sc->sc_dr.dr_rbuf = DZ_UBA_RBUF; 117 sc->sc_dr.dr_dtr = DZ_UBA_DTR; 118 sc->sc_dr.dr_break = DZ_UBA_BREAK; 119 sc->sc_dr.dr_tbuf = DZ_UBA_TBUF; 120 sc->sc_dr.dr_tcr = DZ_UBA_TCR; 121 sc->sc_dr.dr_dcd = DZ_UBA_DCD; 122 sc->sc_dr.dr_ring = DZ_UBA_RING; 124 sc->sc_dr.dr_firstreg = DZ_UBA_FIRSTREG; 125 sc->sc_dr.dr_winsize = DZ_UBA_WINSIZE [all...] |
/src/sys/dev/dec/ |
dz.c | 127 bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_dr.dr_firstreg, 128 sc->sc_dr.dr_winsize, BUS_SPACE_BARRIER_WRITE | 138 bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_dr.dr_firstreg, 139 sc->sc_dr.dr_winsize, BUS_SPACE_BARRIER_WRITE | 238 sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr; 239 dz_write2(sc, sc->sc_dr.dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE); 240 dz_write1(sc, sc->sc_dr.dr_dtr, 0); 241 dz_write1(sc, sc->sc_dr.dr_break, 0); 266 while ((c = dz_read2(sc, sc->sc_dr.dr_rbuf)) & DZ_RBUF_DATA_VALID) [all...] |
dzvar.h | 88 struct dz_regs sc_dr; /* reg pointers */ member in struct:dz_softc
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/src/sys/arch/arm/xscale/ |
ixp425_ixme.c | 55 struct arm32_dma_range sc_dr; member in struct:ixme_softc 85 sc->sc_dr.dr_sysbase = physical_start; 86 sc->sc_dr.dr_busbase = 0; 87 sc->sc_dr.dr_len = physical_end - physical_start; 88 sc->sc_dt._ranges = &sc->sc_dr;
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pxa2x0_i2s.h | 42 bus_dma_segment_t sc_dr; member in struct:pxa2x0_i2s_softc
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pxa2x0_i2s.c | 78 sc->sc_dr.ds_addr = PXA2X0_I2S_BASE + I2S_SADR; 79 sc->sc_dr.ds_len = 4; 348 dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr; 395 dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr;
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pxa2x0_ac97.c | 88 bus_dma_segment_t sc_dr; member in struct:acu_softc 298 sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR; 299 sc->sc_dr.ds_len = 4; 790 dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr; 846 dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr;
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/src/sys/arch/pmax/ibus/ |
dz_ibus.c | 174 sc->sc_dr.dr_csr = 0; 175 sc->sc_dr.dr_rbuf = 8; 176 sc->sc_dr.dr_dtr = 17; 177 sc->sc_dr.dr_break = 25; 178 sc->sc_dr.dr_tbuf = 24; 179 sc->sc_dr.dr_tcr = 16; 180 sc->sc_dr.dr_dcd = 25; 181 sc->sc_dr.dr_ring = 24; 183 sc->sc_dr.dr_firstreg = 0; 184 sc->sc_dr.dr_winsize = sizeof(struct dzregs) [all...] |
/src/sys/arch/vax/vsa/ |
dz_vsbus.c | 149 sc->sc_dr.dr_csr = 0; 150 sc->sc_dr.dr_rbuf = 4; 151 sc->sc_dr.dr_dtr = 9; 152 sc->sc_dr.dr_break = 13; 153 sc->sc_dr.dr_tbuf = 12; 154 sc->sc_dr.dr_tcr = 8; 155 sc->sc_dr.dr_dcd = 13; 156 sc->sc_dr.dr_ring = 13; 158 sc->sc_dr.dr_firstreg = 0; 159 sc->sc_dr.dr_winsize = 14 [all...] |
/src/sys/arch/emips/ebus/ |
ace_ebus.c | 186 struct _Sac *sc_dr; /* reg pointers */ member in struct:ace_softc 235 ace->sc_dr = (struct _Sac *)ia->ia_vaddr; 237 printf(" virt=%p", (void*)ace->sc_dr); 618 struct _Sac *regs = sc->sc_dr; 683 Status = sc->sc_dr->STATUS; 690 sc->sc_dr->CONTROLREG |= SAC_LOCKREQ; 696 Status = sc->sc_dr->STATUS; 708 SysaceDumpRegisters(sc->sc_dr); 726 sc->sc_dr->CONTROLREG &= ~SAC_CFGRESET; 731 Status = sc->sc_dr->STATUS [all...] |
dz_ebus.c | 75 struct _Usart *sc_dr; /* reg pointers */ member in struct:dz_softc 454 dzr = sc->sc_dr; 476 dzr = sc->sc_dr; 531 dzr = sc->sc_dr; 573 dzr = sc->sc_dr; 656 sc->sc_dr = (struct _Usart *)iba->ia_vaddr; 658 printf(" virt=%p ", (void *)sc->sc_dr); 687 dzcn = sc->sc_dr; 712 dzr = sc->sc_dr;
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/src/sys/arch/arm/s3c2xx0/ |
s3c2440_i2s.c | 62 bus_dma_segment_t sc_dr; member in struct:s3c2440_i2s_softc 170 i2s_sc->sc_dr.ds_addr = S3C2440_IIS_BASE + IISFIFO; 171 i2s_sc->sc_dr.ds_len = 4; 414 xfer->dx_desc[DMAC_DESC_DST].xd_dma_segs = &i2s->sc_dr; 476 xfer->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &i2s->sc_dr;
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s3c2440_sdi.c | 84 bus_dma_segment_t sc_dr; member in struct:sssdi_softc 239 sc->sc_dr.ds_addr = S3C2440_SDI_BASE+SDI_DAT_LI_W; 240 sc->sc_dr.ds_len = 4; 453 xfer->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr; 489 xfer->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr;
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/src/sys/arch/vax/uba/ |
qvaux.c | 811 status = qvaux_read1(sc, sc->sc_dr.dr_dcd) | sc->sc_dsr; 814 status = qvaux_read1(sc, sc->sc_dr.dr_ring); 819 status = qvaux_read1(sc, sc->sc_dr.dr_dtr); 846 qvaux_write1(sc, sc->sc_dr.dr_dtr, 847 qvaux_read1(sc, sc->sc_dr.dr_dtr) | bit); 849 qvaux_write1(sc, sc->sc_dr.dr_dtr, 850 qvaux_read1(sc, sc->sc_dr.dr_dtr) & ~bit);
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