/src/sys/arch/evbarm/dev/ |
plcomvar.h | 144 u_char sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd; member in struct:plcom_softc
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plcom.c | 1499 sc->sc_mcr_rts = PL01X_MCR_RTS; 1504 sc->sc_mcr_rts = 0; 1515 sc->sc_mcr_rts = PL01X_MCR_DTR; 1530 sc->sc_mcr_rts = 0; 1706 if (sc->sc_mcr_rts == 0) 1739 if (sc->sc_mcr_rts == 0) 1743 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1744 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1746 SET(sc->sc_mcr, sc->sc_mcr_rts); 1747 SET(sc->sc_mcr_active, sc->sc_mcr_rts); [all...] |
/src/sys/arch/atari/dev/ |
ser.c | 185 uint8_t sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd; member in struct:ser_softc 731 sc->sc_mcr_rts = MCR_RTS; 740 sc->sc_mcr_rts = MCR_DTR; 750 sc->sc_mcr_rts = 0; 878 if (sc->sc_mcr_rts == 0) 910 if (sc->sc_mcr_rts == 0) 914 CLR(sc->sc_mcr, sc->sc_mcr_rts); 915 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 917 SET(sc->sc_mcr, sc->sc_mcr_rts); 918 SET(sc->sc_mcr_active, sc->sc_mcr_rts); [all...] |
/src/sys/arch/arm/s3c2xx0/ |
sscom_var.h | 162 uint8_t sc_mcr_rts; /* RTS or DTR in sc_umcon */ member in struct:sscom_softc
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sscom.c | 1086 sc->sc_mcr_rts = UMCON_RTS; 1095 sc->sc_mcr_rts = UMCON_DTR; 1105 sc->sc_mcr_rts = 0; 1226 if (sc->sc_mcr_rts == 0) 1259 if (sc->sc_mcr_rts == 0) 1263 CLR(sc->sc_umcon, sc->sc_mcr_rts); 1264 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1266 SET(sc->sc_umcon, sc->sc_mcr_rts); 1267 SET(sc->sc_mcr_active, sc->sc_mcr_rts);
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/src/sys/dev/ic/ |
comvar.h | 182 u_char sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd; member in struct:com_softc
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com.c | 1622 sc->sc_mcr_rts = MCR_RTS; 1635 sc->sc_mcr_rts = MCR_DTR; 1649 sc->sc_mcr_rts = 0; 1886 if (sc->sc_mcr_rts == 0) 1919 if (sc->sc_mcr_rts == 0) 1923 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1924 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1926 SET(sc->sc_mcr, sc->sc_mcr_rts); 1927 SET(sc->sc_mcr_active, sc->sc_mcr_rts);
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/src/sys/arch/arm/imx/ |
imxuart.c | 1234 sc->sc_mcr_rts = MCR_RTS; 1243 sc->sc_mcr_rts = MCR_DTR; 1253 sc->sc_mcr_rts = 0; 1375 if (sc->sc_mcr_rts == 0) 1410 if (sc->sc_mcr_rts == 0) 1414 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1415 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1417 SET(sc->sc_mcr, sc->sc_mcr_rts); 1418 SET(sc->sc_mcr_active, sc->sc_mcr_rts);
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/src/sys/arch/arm/xilinx/ |
zynq_uart.c | 1198 sc->sc_mcr_rts = MCR_RTS; 1207 sc->sc_mcr_rts = MCR_DTR; 1217 sc->sc_mcr_rts = 0; 1333 if (sc->sc_mcr_rts == 0) 1368 if (sc->sc_mcr_rts == 0) 1372 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1373 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1375 SET(sc->sc_mcr, sc->sc_mcr_rts); 1376 SET(sc->sc_mcr_active, sc->sc_mcr_rts);
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/src/sys/arch/arm/sa11x0/ |
sa11x0_com.c | 1007 if (sc->sc_mcr_rts == 0)
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