| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_mipi_dsi.c | 1081 * mipi_dsi_dcs_set_tear_scanline() - set the scanline to use as trigger for
1084 * @scanline: scanline to use as trigger
1088 int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)
1090 u8 payload[3] = { MIPI_DCS_SET_TEAR_SCANLINE, scanline >> 8,
1091 scanline & 0xff };
|
| /src/sys/external/bsd/drm2/include/ |
| i915_trace.h | 49 "uint32_t"/*scanline*/);
63 "uint32_t"/*scanline*/);
434 "int"/*scanline*/,
452 "int"/*scanline*/,
469 "int"/*scanline*/);
472 int scanline)
474 TRACE3(i915,, pipe__update__end, crtc->pipe, frame, scanline);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_sprite.c | 93 int scanline, min, max, vblank_start; local in function:intel_pipe_update_start
132 (scanline = intel_get_crtc_scanline(crtc),
133 scanline < min || scanline > max));
140 * On VLV/CHV DSI the scanline counter would appear to
141 * increment approx. 1/3 of a scanline before start of vblank.
148 * critical scanline, but that would require more changes
150 * thing and poll for the bad scanline to pass us by.
154 while (need_vlv_dsi_wa && scanline == vblank_start)
155 scanline = intel_get_crtc_scanline(crtc)
[all...] |
| intel_hdmi.c | 1459 u32 scanline; local in function:kbl_repositioning_enc_en_signal
1463 scanline = I915_READ(PIPEDSL(intel_crtc->pipe));
1464 if (scanline > 100 && scanline < 200)
|
| /src/sys/dev/stbi/ |
| stb_image.c | 1001 // avoid switch per pixel, so use switch per scanline and massive macros
1524 // in trivial scanline order
4210 return epuc("bad file","scanline overrun");
4219 if (count>left) return epuc("bad file","scanline overrun");
4833 stbi_uc *scanline; local in function:hdr_load
4887 scanline = NULL;
4904 FREE(scanline);
4909 if (len != width) { FREE(hdr_data); FREE(scanline); return epf("invalid decoded scanline length", "corrupt HDR"); }
4910 if (scanline == NULL) scanline = MALLOC(width * 4)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_irq.c | 558 * -vbs-----> <---vbs+1---> <---vbs+2---> <-----0-----> <-----1-----> <-----2--- (scanline counter gen2)
559 * -vbs-2---> <---vbs-1---> <---vbs-----> <---vbs+1---> <---vbs+2---> <-----0--- (scanline counter gen3+)
560 * -vbs-2---> <---vbs-2---> <---vbs-1---> <---vbs-----> <---vbs+1---> <---vbs+2- (scanline counter hsw+ hdmi)
661 * scanline register will not work to get the scanline,
663 * with scanline register updates.
665 * timestamp registers to calculate the scanline.
677 u32 scanline, scan_prev_time, scan_curr_time, scan_post_time; local in function:__intel_get_crtc_scanline_from_timestamp
702 scanline = div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
704 scanline = min(scanline, vtotal - 1)
[all...] |
