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    Searched refs:sched_base (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/dev/pci/
if_iwmvar.h 401 uint32_t sched_base; member in struct:iwm_softc
if_iwnvar.h 249 uint32_t sched_base; member in struct:iwn_softc
if_iwn.c 5266 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
5277 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
5280 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5325 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
5339 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5505 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5506 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
5522 iwn_mem_write(sc, sc->sched_base +
5525 iwn_mem_write(sc, sc->sched_base +
5561 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR)
    [all...]
if_iwm.c 2168 sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0);
2172 sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) +
2253 if (sc->sched_base != base) {
2255 DEVNAME(sc), sc->sched_base, base));
2256 sc->sched_base = base;
2268 sc->sched_base + IWM_SCD_CONTEXT_MEM_LOWER_BOUND,
8419 sc->sched_base = le32toh(resp1->scd_base_ptr);
8433 sc->sched_base = le32toh(resp2->scd_base_ptr);
8448 sc->sched_base = le32toh(resp3->scd_base_ptr);

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