HomeSort by: relevance | last modified time | path
    Searched refs:setOpcode (Results 1 - 25 of 74) sorted by relevancy

1 2 3

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCDuplexInfo.cpp 713 Result.setOpcode(Hexagon::SA1_inc);
719 Result.setOpcode(Hexagon::SA1_dec);
726 Result.setOpcode(Hexagon::SA1_addsp);
732 Result.setOpcode(Hexagon::SA1_addi);
738 Result.setOpcode(Hexagon::SA1_addrx);
744 Result.setOpcode(Hexagon::SS2_allocframe);
749 Result.setOpcode(Hexagon::SA1_zxtb);
754 Result.setOpcode(Hexagon::SA1_and1);
760 Result.setOpcode(Hexagon::SA1_cmpeqi);
769 Result.setOpcode(Hexagon::SA1_combine1i)
    [all...]
HexagonMCCompound.cpp 214 CompoundInsn->setOpcode(compoundOpcode);
227 CompoundInsn->setOpcode(compoundOpcode);
241 CompoundInsn->setOpcode(compoundOpcode);
254 CompoundInsn->setOpcode(compoundOpcode);
267 CompoundInsn->setOpcode(compoundOpcode);
285 CompoundInsn->setOpcode(compoundOpcode);
303 CompoundInsn->setOpcode(compoundOpcode);
314 CompoundInsn->setOpcode(compoundOpcode);
325 CompoundInsn->setOpcode(compoundOpcode);
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp 280 Inst.setOpcode(XCore::STW_2rus);
283 Inst.setOpcode(XCore::LDW_2rus);
286 Inst.setOpcode(XCore::ADD_3r);
289 Inst.setOpcode(XCore::SUB_3r);
292 Inst.setOpcode(XCore::SHL_3r);
295 Inst.setOpcode(XCore::SHR_3r);
298 Inst.setOpcode(XCore::EQ_3r);
301 Inst.setOpcode(XCore::AND_3r);
304 Inst.setOpcode(XCore::OR_3r);
307 Inst.setOpcode(XCore::LDW_3r)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonAsmPrinter.cpp 249 T.setOpcode(Inst.getOpcode());
278 Inst.setOpcode(Hexagon::A2_addi);
292 Inst.setOpcode(Hexagon::A2_paddif);
299 Inst.setOpcode(Hexagon::A2_paddit);
306 Inst.setOpcode(Hexagon::A2_paddifnew);
313 Inst.setOpcode(Hexagon::A2_padditnew);
320 Inst.setOpcode(Hexagon::A2_andir);
336 TmpInst.setOpcode(Hexagon::L2_loadrdgp);
352 TmpInst.setOpcode(Hexagon::L2_loadrigp);
365 MappedInst.setOpcode(Hexagon::C2_or)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/AsmParser/
HexagonAsmParser.cpp 165 MCB.setOpcode(Hexagon::BUNDLE);
539 NewInst.setOpcode(MCI.getOpcode());
1237 TmpInst.setOpcode(opCode);
1344 Inst.setOpcode(Hexagon::A2_addi);
1378 Inst.setOpcode(Hexagon::C2_cmpgti);
1392 TmpInst.setOpcode(Hexagon::C2_cmpeq);
1402 Inst.setOpcode(Hexagon::C2_cmpgtui);
1413 Inst.setOpcode(Hexagon::A2_combinew);
1423 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt)
1434 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCInstBuilder.h 27 Inst.setOpcode(Opcode);
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFMCInstLower.cpp 48 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVMCInstLower.cpp 139 OutMI.setOpcode(RVV->BaseInstr);
212 OutMI.setOpcode(MI->getOpcode());
235 OutMI.setOpcode(RISCV::CSRRS);
241 OutMI.setOpcode(RISCV::CSRRS);
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEAsmPrinter.cpp 86 SICInst.setOpcode(VE::SIC);
94 BSICInst.setOpcode(VE::BSICrii);
106 LEAInst.setOpcode(VE::LEAzii);
118 LEASLInst.setOpcode(VE::LEASLzii);
130 LEAInst.setOpcode(VE::LEAzii);
143 LEASLInst.setOpcode(VE::LEASLrri);
155 Inst.setOpcode(Opcode);
VEMCInstLower.cpp 79 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/Disassembler/
MipsDisassembler.cpp 681 MI.setOpcode(Mips::BOVC);
684 MI.setOpcode(Mips::BEQC);
687 MI.setOpcode(Mips::BEQZALC);
709 MI.setOpcode(Mips::BOVC_MMR6);
716 MI.setOpcode(Mips::BEQC_MMR6);
723 MI.setOpcode(Mips::BEQZALC_MMR6);
754 MI.setOpcode(Mips::BNVC);
757 MI.setOpcode(Mips::BNEC);
760 MI.setOpcode(Mips::BNEZALC);
782 MI.setOpcode(Mips::BNVC_MMR6)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMInstrInfo.cpp 38 NopInst.setOpcode(ARM::HINT);
43 NopInst.setOpcode(ARM::MOVr);
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kMCInstLower.cpp 147 OutMI.setOpcode(Opcode);
168 OutMI.setOpcode(Opcode);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcMCInstLower.cpp 98 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 754 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ?
766 TmpInst.setOpcode(PPC::DCBT);
776 TmpInst.setOpcode(PPC::DCBTST);
799 TmpInst.setOpcode(PPC::DCBF);
808 TmpInst.setOpcode(PPC::LA);
817 TmpInst.setOpcode(PPC::ADDI);
826 TmpInst.setOpcode(PPC::ADDIS);
835 TmpInst.setOpcode(PPC::ADDIC);
844 TmpInst.setOpcode(PPC::ADDIC_rec);
856 TmpInst.setOpcode(Opcode == PPC::EXTLWI ? PPC::RLWINM : PPC::RLWINM_rec)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64AsmPrinter.cpp 1074 MI.setOpcode(Opcode);
1103 MOVI.setOpcode(AArch64::MOVID);
1112 FMov.setOpcode(AArch64::FMOVWHr);
1117 FMov.setOpcode(AArch64::FMOVWSr);
1122 FMov.setOpcode(AArch64::FMOVXDr);
1187 MovZ.setOpcode(AArch64::MOVZXi);
1194 MovK.setOpcode(AArch64::MOVKXi);
1208 TmpInst.setOpcode(AArch64::MOVIv16b_ns);
1247 TmpInst.setOpcode(AArch64::BR);
1256 TmpInst.setOpcode(AArch64::B)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/
HexagonDisassembler.cpp 173 MI.setOpcode(Hexagon::BUNDLE);
205 MI.setOpcode(Hexagon::S6_allocframe_to_raw);
213 MI.setOpcode(L6_deallocframe_map_to_raw);
221 MI.setOpcode(L6_return_map_to_raw);
229 MI.setOpcode(L4_return_map_to_raw_t);
237 MI.setOpcode(L4_return_map_to_raw_f);
245 MI.setOpcode(L4_return_map_to_raw_tnew_pt);
253 MI.setOpcode(L4_return_map_to_raw_fnew_pt);
261 MI.setOpcode(L4_return_map_to_raw_tnew_pnt);
269 MI.setOpcode(L4_return_map_to_raw_fnew_pnt)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsMCInstLower.cpp 216 OutMI.setOpcode(Mips::LUi);
254 OutMI.setOpcode(Opcode);
319 OutMI.setOpcode(MI->getOpcode());
MipsAsmPrinter.cpp 123 TmpInst0.setOpcode(Mips::JALR64);
128 TmpInst0.setOpcode(Mips::JRC16_MMR6);
130 TmpInst0.setOpcode(Mips::JALR);
135 TmpInst0.setOpcode(Mips::JR_MM);
138 TmpInst0.setOpcode(Mips::JR);
860 I.setOpcode(Mips::JAL);
869 I.setOpcode(Opcode);
888 I.setOpcode(Opcode);
898 I.setOpcode(Opcode);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCMCInstLower.cpp 105 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRMCInstLower.cpp 63 OutMI.setOpcode(MI.getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiMCInstLower.cpp 94 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430MCInstLower.cpp 116 OutMI.setOpcode(MI->getOpcode());
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
RISCVAsmBackend.cpp 154 Res.setOpcode(RISCV::BEQ);
161 Res.setOpcode(RISCV::BNE);
168 Res.setOpcode(RISCV::JAL);
174 Res.setOpcode(RISCV::JAL);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZMCInstLower.cpp 95 OutMI.setOpcode(MI->getOpcode());

Completed in 80 milliseconds

1 2 3