| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_init.c | 59 .set_drr = dcn10_set_drr,
|
| amdgpu_dcn10_optc.c | 851 * Function: set_drr
1483 .set_drr = optc1_set_drr,
|
| amdgpu_dcn10_hw_sequencer.c | 911 if (pipe_ctx->stream_res.tg->funcs->set_drr)
912 pipe_ctx->stream_res.tg->funcs->set_drr(
2731 pipe_ctx[i]->stream_res.tg->funcs->set_drr(
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_init.c | 62 .set_drr = dcn10_set_drr,
|
| amdgpu_dcn20_optc.c | 449 .set_drr = optc1_set_drr,
|
| amdgpu_dcn20_hwseq.c | 686 if (pipe_ctx->stream_res.tg->funcs->set_drr)
687 pipe_ctx->stream_res.tg->funcs->set_drr(
2067 if (pipe_ctx->stream_res.tg->funcs->set_drr)
2068 pipe_ctx->stream_res.tg->funcs->set_drr(
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_init.c | 63 .set_drr = dcn10_set_drr,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
| amdgpu_dce80_timing_generator.c | 216 .set_drr = dce110_timing_generator_set_drr,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| hw_sequencer.h | 102 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, member in struct:hw_sequencer_funcs
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| timing_generator.h | 211 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); member in struct:timing_generator_funcs
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_hw_sequencer.c | 1374 if (pipe_ctx->stream_res.tg->funcs->set_drr)
1375 pipe_ctx->stream_res.tg->funcs->set_drr(
1710 static void set_drr(struct pipe_ctx **pipe_ctx, function in typeref:typename:void
1729 pipe_ctx[i]->stream_res.tg->funcs->set_drr(
2746 .set_drr = set_drr,
|
| amdgpu_dce110_timing_generator.c | 362 * Function: set_drr
2243 .set_drr =
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| amdgpu_dce120_timing_generator.c | 1240 .set_drr = dce120_timing_generator_set_drr,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc.c | 295 dc->hwss.set_drr(&pipe,
|
