/src/sys/compat/common/ |
if_spppsubr50.c | 129 struct spppkeepalivesettings50 *settings = local in function:sppp_compat50_params 133 settings->maxalive = sp->pp_maxalive; 134 settings->max_noreceive = (uint32_t)sp->pp_max_noreceive; 140 struct spppkeepalivesettings50 *settings = local in function:sppp_compat50_params 144 sp->pp_maxalive = settings->maxalive; 145 sp->pp_max_noreceive = (time_t)settings->max_noreceive;
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/src/sys/dev/acpi/ |
nxpiic_acpi.c | 96 struct motoi2c_settings settings; local in function:nxpiic_acpi_attach 133 settings.i2c_adr = MOTOI2C_ADR_DEFAULT; 134 settings.i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT; 139 settings.i2c_fdr = nxpiic_clk_div[n].ibc; 145 motoi2c_attach(sc, &settings);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
amdgpu_dc_link.c | 883 // For seamless boot, to skip verify link cap, we read UEFI settings and set them as verified. 1509 /* get link settings for video mode timing */ 1588 struct ext_hdmi_settings *settings) 1599 * Get retimer settings from sbios for passing SI eye test for DCE11 1604 // Check if current bios contains ext Hdmi settings 1608 settings->slv_addr = integrated_info->dp0_ext_hdmi_slv_addr; 1609 settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num; 1610 settings->reg_num_6g = integrated_info->dp0_ext_hdmi_6g_reg_num; 1611 memmove(settings->reg_settings, 1614 memmove(settings->reg_settings_6g 2077 struct ext_hdmi_settings settings = {0}; local in function:enable_link_hdmi 3102 struct ext_hdmi_settings settings = {0}; local in function:core_link_disable_stream [all...] |
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
intel-ixp42x-arcom-vulcan.dts | 54 /* Expansion bus settings */ 70 /* Expansion bus settings */ 89 /* Expansion bus settings */ 101 /* Expansion bus settings */ 108 /* Expansion bus settings */
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dra76x.dtsi | 142 ti,efuse-settings = <
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s3c2416-pinctrl.dtsi | 3 * Samsung S3C2416 pinctrl settings
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uniphier-pinctrl.dtsi | 3 // Device Tree Source for UniPhier SoCs default pinctrl settings
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imx53-qsb-common.dtsi | 132 /* CPU rated to 1GHz, not 1.2GHz as per the default settings */
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ls1021a-tsn.dts | 49 /* SPI controller settings for SJA1105 timing requirements */
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r7s9210-rza2mevb.dts | 20 * Please make sure your sub-board matches the following switch settings:
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ste-href-ab8500.dtsi | 13 /* Hog a few default settings */
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ste-href.dtsi | 272 /* Some boards set additional settings here */
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
zynqmp-zc1751-xm017-dc3.dts | 116 /* SATA phy OOB timing settings */ 127 &sdhci1 { /* emmc with some settings */
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zynqmp-zc1751-xm015-dc1.dts | 102 /* SATA phy OOB timing settings */
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zynqmp-zcu104-revA.dts | 189 /* SATA OOB timing settings */
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zynqmp-zcu104-revC.dts | 245 /* SATA OOB timing settings */
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/src/sys/dev/i2c/ |
motoi2c.c | 85 const struct motoi2c_settings *settings) 87 if (settings == NULL) { 90 sc->sc_settings = *settings;
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/ |
rzg2ul-smarc.dtsi | 90 renesas,settings = [
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/src/sys/arch/sandpoint/ |
README | 101 settings for, say, bootp/tftp boot, automatic boot, and persistent 102 settings (for console rate, auto boot, bootp, etc), and that might
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/src/sys/dev/usb/ |
if_upgtvar.h | 180 uint8_t settings; member in struct:upgt_eeprom_freq4_header 302 uint8_t settings; member in struct:upgt_lmac_channel
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/src/sys/external/isc/atheros_hal/dist/ar5416/ |
ar9285_attach.c | 368 ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) 375 switch (settings) { 388 /* Restore original chainmask settings */
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/src/sys/external/isc/atheros_hal/dist/ar5211/ |
ar5211_misc.c | 137 * and is unaffected by regulatory/country code settings. 604 ar5211SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) 610 AH5211(ah)->ah_diversityControl = settings; 613 return ar5211SetAntennaSwitchInternal(ah, settings, chan);
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/src/sys/external/isc/atheros_hal/dist/ar5210/ |
ar5210_misc.c | 125 * and is unaffected by regulatory/country code settings. 299 ar5210SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) 302 return (settings == HAL_ANT_VARIABLE);
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/src/sys/netbt/ |
hci.h | 313 /* Link policy settings */ 941 uint16_t settings; /* link policy settings */ member in struct:__anonf724d2114208 948 uint16_t settings; /* link policy settings */ member in struct:__anonf724d2114308 961 uint16_t settings; /* link policy settings */ member in struct:__anonf724d2114508 967 uint16_t settings; /* link policy settings */ member in struct:__anonf724d2114608 1258 uint16_t settings; /* voice settings * member in struct:__anonf724d2116808 1264 uint16_t settings; \/* voice settings *\/ member in struct:__anonf724d2116908 [all...] |
/src/sys/external/bsd/acpica/dist/compiler/ |
readme.txt | 133 Project/Settings/CustomBuild with the following settings (or similar):
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