| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_pm4_headers.h | 78 uint32_t sh_mem_ape1_limit; member in struct:pm4_map_process
129 uint32_t sh_mem_ape1_limit; member in struct:pm4_map_process_scratch_kv
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| kfd_device_queue_manager_v10.c | 77 qpd->sh_mem_ape1_limit = 0;
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| kfd_device_queue_manager_v9.c | 74 qpd->sh_mem_ape1_limit = 0;
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| kfd_device_queue_manager_cik.c | 135 qpd->sh_mem_ape1_limit = 0;
169 qpd->sh_mem_ape1_limit = 0;
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| kfd_device_queue_manager_vi.c | 175 qpd->sh_mem_ape1_limit = 0;
217 qpd->sh_mem_ape1_limit = 0;
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| kfd_packet_manager_vi.c | 69 packet->sh_mem_ape1_limit = qpd->sh_mem_ape1_limit;
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| kfd_pm4_headers_vi.h | 176 uint32_t sh_mem_ape1_limit; member in struct:pm4_mes_map_process
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| kfd_device_queue_manager.c | 136 qpd->sh_mem_ape1_limit,
1499 qpd->sh_mem_ape1_limit = 0;
1504 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1505 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1521 qpd->sh_mem_ape1_limit = limit >> 16;
1537 qpd->sh_mem_ape1_limit);
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| kfd_priv.h | 570 uint32_t sh_mem_ape1_limit; member in struct:qcm_process_device
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_amdkfd_gfx_v9.h | 29 uint32_t sh_mem_ape1_base, uint32_t sh_mem_ape1_limit,
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| amdgpu_amdkfd_gfx_v7.c | 159 uint32_t sh_mem_ape1_limit,
168 WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
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| amdgpu_amdkfd_gfx_v8.c | 116 uint32_t sh_mem_ape1_limit,
125 WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
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| amdgpu_amdkfd_gfx_v10.c | 132 uint32_t sh_mem_ape1_limit,
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| amdgpu_amdkfd_gfx_v9.c | 128 uint32_t sh_mem_ape1_limit,
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| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| kgd_kfd_interface.h | 249 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
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