| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_sseu.h | 33 /* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
72 intel_sseu_has_subslice(const struct sseu_dev_info *sseu, int slice,
80 mask = sseu->subslice_mask[slice * sseu->ss_stride + ss_idx];
92 intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice);
94 u32 intel_sseu_get_subslices(const struct sseu_dev_info *sseu, u8 slice);
96 void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice,
|
| intel_sseu.c | 40 u32 intel_sseu_get_subslices(const struct sseu_dev_info *sseu, u8 slice)
42 int i, offset = slice * sseu->ss_stride;
45 GEM_BUG_ON(slice >= sseu->max_slices);
54 void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice,
57 int offset = slice * sseu->ss_stride;
63 intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice)
65 return hweight32(intel_sseu_get_subslices(sseu, slice));
79 * slice/subslice/EU enablement prior to Gen9.
101 * amount of half of all available subslices per slice.
128 * When more than one slice is enabled, hardware ignores the subslic
[all...] |
| intel_engine_cs.c | 928 int slice, int subslice, i915_reg_t reg)
937 mcr_ss = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice);
940 mcr_ss = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);
979 int slice; local in function:intel_engine_get_instdone
994 for_each_instdone_slice_subslice(i915, sseu, slice, subslice) {
995 instdone->sampler[slice][subslice] =
996 read_subslice_reg(engine, slice, subslice,
998 instdone->row[slice][subslice] =
999 read_subslice_reg(engine, slice, subslice,
|
| intel_workarounds.c | 404 * ss_max == 4 (maximum number of subslices possible per slice)
787 unsigned int slice, subslice; local in function:wa_init_mcr
794 * L3Banks could be fused off in single slice scenario. If that is
800 * Before any MMIO read into slice/subslice specific registers, MCR
831 slice = fls(sseu->slice_mask) - 1;
832 subslice = fls(l3_en & intel_sseu_get_subslices(sseu, slice));
835 intel_sseu_get_subslices(sseu, slice), l3_en);
842 mcr = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice);
845 mcr = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);
849 DRM_DEBUG_DRIVER("MCR slice/subslice = %x\n", mcr)
[all...] |
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/ |
| argon2-core.h | 116 uint8_t slice; member in struct:Argon2_position_t
159 if (position->slice == 0) {
160 /* First slice */
167 position->slice * instance->segment_length +
171 position->slice * instance->segment_length +
199 start_position = (position->slice == ARGON2_SYNC_POINTS - 1)
201 : (position->slice + 1) * instance->segment_length;
|
| argon2-fill-block-avx2.c | 113 input_block.v[2] = position->slice;
162 (position.pass != 0 || position.slice >= ARGON2_SYNC_POINTS / 2)) {
174 if ((0 == position.pass) && (0 == position.slice)) {
180 position.slice * instance->segment_length + starting_index;
214 if ((position.pass == 0) && (position.slice == 0)) {
|
| argon2-fill-block-avx512f.c | 118 input_block.v[2] = position->slice;
167 (position.pass != 0 || position.slice >= ARGON2_SYNC_POINTS / 2)) {
179 if ((0 == position.pass) && (0 == position.slice)) {
185 position.slice * instance->segment_length + starting_index;
219 if ((position.pass == 0) && (position.slice == 0)) {
|
| argon2-fill-block-ref.c | 124 input_block.v[2] = position->slice;
160 (position.pass != 0 || position.slice >= ARGON2_SYNC_POINTS / 2)) {
172 if ((0 == position.pass) && (0 == position.slice)) {
178 position.slice * instance->segment_length + starting_index;
209 if ((position.pass == 0) && (position.slice == 0)) {
|
| argon2-fill-block-ssse3.c | 112 input_block.v[2] = position->slice;
161 (position.pass != 0 || position.slice >= ARGON2_SYNC_POINTS / 2)) {
173 if ((0 == position.pass) && (0 == position.slice)) {
179 position.slice * instance->segment_length + starting_index;
213 if ((position.pass == 0) && (position.slice == 0)) {
|
| /src/sys/arch/ia64/stand/efi/libefi/ |
| devicename.c | 88 * disk<unit>[s<slice>][<partition>]:
97 int i, unit, slice, partition, err; local in function:efi_parsedev
129 slice = -1;
137 if (*cp == 's') { /* got a slice number */
139 slice = strtol(np, &cp, 10);
141 err = EPART; /* XXX : NetBSD calls a FreeBSD SLICE, a Partition! */
164 idev->d_kind.efidisk.slice = slice;
230 if (dev->d_kind.efidisk.slice > 0) {
231 len += snprintf(buf + len, buflen - len, "s%d", dev->d_kind.efidisk.slice);
[all...] |
| efiboot.h | 49 int slice; member in struct:efi_devdesc::__anond679b1af010a::__anond679b1af0208
|
| /src/sys/arch/ia64/stand/ia64/ski/ |
| devicename.c | 84 * disk<unit>[s<slice>][<partition>]:
93 int i, unit, slice, partition, err; local in function:ski_parsedev
124 slice = -1;
132 if (*cp == 's') { /* got a slice number */
134 slice = strtol(np, &cp, 10);
159 idev->d_kind.skidisk.slice = slice;
225 if (dev->d_kind.skidisk.slice > 0) {
226 len += snprintf(buf + len, buflen - len, "s%d", dev->d_kind.skidisk.slice);
|
| libski.h | 41 int slice; member in struct:ski_devdesc::__anonfaea0121010a::__anonfaea01210208
|
| main.c | 101 currdev.d_kind.skidisk.slice = -1;
|
| /src/usr.sbin/sysinst/arch/mac68k/ |
| md.h | 117 unsigned int slice : 5; /* Slice number to assocate with plus one */ member in struct:__anon66f6aa490308::__anon66f6aa490408
|
| /src/sbin/gpt/ |
| migrate.c | 236 migrate(gpt_t gpt, u_int parts, int force, int slice, int active)
274 if (slice) {
347 int slice = 0; local in function:cmd_migrate
365 slice = 1;
375 return migrate(gpt, parts, force, slice, active);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_sysfs.c | 174 int slice = (int)(uintptr_t)attr->private; local in function:i915_l3_read
186 if (i915->l3_parity.remap_info[slice])
188 i915->l3_parity.remap_info[slice] + offset / sizeof(u32),
202 int slice = (int)(uintptr_t)attr->private; local in function:i915_l3_write
220 if (i915->l3_parity.remap_info[slice]) {
222 remap_info = i915->l3_parity.remap_info[slice];
224 i915->l3_parity.remap_info[slice] = remap_info;
232 ctx->remap_slice |= BIT(slice);
596 DRM_ERROR("l3 parity slice 1 setup failed\n");
|
| intel_device_info.c | 118 drm_printf(p, "slice total: %u, mask=%04x\n",
122 drm_printf(p, "slice%d: %u subslices, mask=%08x\n",
128 drm_printf(p, "has slice power gating: %s\n",
144 static int sseu_eu_idx(const struct sseu_dev_info *sseu, int slice,
149 return slice * slice_stride + subslice * sseu->eu_stride;
152 static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice,
155 int i, offset = sseu_eu_idx(sseu, slice, subslice);
166 static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice,
169 int i, offset = sseu_eu_idx(sseu, slice, subslice);
188 drm_printf(p, "slice%d: %u subslice(s) (0x%08x):\n"
[all...] |
| i915_gpu_error.c | 435 int slice; local in function:error_print_instdone
450 for_each_instdone_slice_subslice(m->i915, sseu, slice, subslice)
452 slice, subslice,
453 ee->instdone.sampler[slice][subslice]);
455 for_each_instdone_slice_subslice(m->i915, sseu, slice, subslice)
457 slice, subslice,
458 ee->instdone.row[slice][subslice]);
|
| i915_reg.h | 2638 #define GEN8_MCR_SLICE(slice) (((slice) & 3) << 26)
2642 #define GEN11_MCR_SLICE(slice) (((slice) & 0xf) << 27)
2774 #define GEN9_IZ_HASHING_MASK(slice) (0x3 << ((slice) * 2))
2775 #define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2))
2933 /* Arbiter time slice for non-isoch streams */
3051 #define GEN9_EU_DISABLE(slice) _MMIO(0x9134 + (slice) * 0x4
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/ltc/ |
| nouveau_nvkm_subdev_ltc_gm107.c | 115 const u32 slice = nvkm_rd32(device, 0x17e280) >> 28; local in function:gm107_ltc_oneinit
122 ltc->lts_nr = slice;
|
| nouveau_nvkm_subdev_ltc_gf100.c | 218 const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28; local in function:gf100_ltc_oneinit
225 ltc->lts_nr = slice;
|
| /src/sys/arch/i386/include/ |
| multiboot2.h | 238 multiboot_uint32_t slice; member in struct:multiboot_tag_bootdev
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen_cs.c | 407 unsigned pitch, slice, mslice; local in function:evergreen_cs_track_validate_cb
413 slice = track->cb_color_slice[id];
415 surf.nby = ((slice + 1) * 64) / surf.nbx;
456 * program slice with ALIGN(h, 8), catch this and patch
477 slice = ((nby * surf.nbx) / 64) - 1;
482 ib[track->cb_color_slice_idx[id]] = slice;
489 "offset %d, max layer %d, bo size %ld, slice %d)\n",
492 radeon_bo_size(track->cb_color_bo[id]), slice);
578 unsigned pitch, slice, mslice; local in function:evergreen_cs_track_validate_stencil
584 slice = track->db_depth_slice
683 unsigned pitch, slice, mslice; local in function:evergreen_cs_track_validate_depth
[all...] |
| /src/sys/external/bsd/drm/dist/shared-core/ |
| r600_blit.c | 1205 int pitch, slice; local in function:set_render_target
1215 slice = ((w * h) / 64) - 1;
1234 OUT_RING((pitch << 0) | (slice << 10));
|
