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  /src/sys/arch/arm/nvidia/
tegra_pinmux.h 48 uint32_t slwrr_mask; member in struct:tegra_pinmux_pins::__anon452d3cca010a::__anon452d3cca0208
tegra_pinmux.c 195 cfg &= ~pin_def->tpp_dg.slwrr_mask;
196 cfg |= __SHIFTIN(val, pin_def->tpp_dg.slwrr_mask);
tegra210_pinmux.c 57 .slwrr_mask = slwrr_m, \

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