| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_vega12_processpptables.c | 109 struct pp_atomfwctrl_smc_dpm_parameters smc_dpm_table; local in function:append_vbios_pptable
112 pp_atomfwctrl_get_smc_dpm_information(hwmgr, &smc_dpm_table) == 0,
116 ppsmc_pptable->Liquid1_I2C_address = smc_dpm_table.liquid1_i2c_address;
117 ppsmc_pptable->Liquid2_I2C_address = smc_dpm_table.liquid2_i2c_address;
118 ppsmc_pptable->Vr_I2C_address = smc_dpm_table.vr_i2c_address;
119 ppsmc_pptable->Plx_I2C_address = smc_dpm_table.plx_i2c_address;
121 ppsmc_pptable->Liquid_I2C_LineSCL = smc_dpm_table.liquid_i2c_linescl;
122 ppsmc_pptable->Liquid_I2C_LineSDA = smc_dpm_table.liquid_i2c_linesda;
123 ppsmc_pptable->Vr_I2C_LineSCL = smc_dpm_table.vr_i2c_linescl;
124 ppsmc_pptable->Vr_I2C_LineSDA = smc_dpm_table.vr_i2c_linesda
[all...] |
| amdgpu_vega20_processpptables.c | 723 struct atom_smc_dpm_info_v4_4 *smc_dpm_table; local in function:append_vbios_pptable
728 smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL),
732 ppsmc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
733 ppsmc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
735 ppsmc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
736 ppsmc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
737 ppsmc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
738 ppsmc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
740 ppsmc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
741 ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_navi10_ppt.c | 432 struct atom_smc_dpm_info_v4_5 *smc_dpm_table; local in function:navi10_append_powerplay_table
439 (uint8_t **)&smc_dpm_table);
443 memcpy(smc_pptable->I2cControllers, smc_dpm_table->I2cControllers,
447 smc_pptable->MaxVoltageStepGfx = smc_dpm_table->MaxVoltageStepGfx;
448 smc_pptable->MaxVoltageStepSoc = smc_dpm_table->MaxVoltageStepSoc;
449 smc_pptable->VddGfxVrMapping = smc_dpm_table->VddGfxVrMapping;
450 smc_pptable->VddSocVrMapping = smc_dpm_table->VddSocVrMapping;
451 smc_pptable->VddMem0VrMapping = smc_dpm_table->VddMem0VrMapping;
452 smc_pptable->VddMem1VrMapping = smc_dpm_table->VddMem1VrMapping;
453 smc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->GfxUlvPhaseSheddingMask
[all...] |
| amdgpu_vega20_ppt.c | 488 struct atom_smc_dpm_info_v4_4 *smc_dpm_table; local in function:vega20_append_powerplay_table
495 (uint8_t **)&smc_dpm_table);
499 smc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
500 smc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
502 smc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
503 smc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
504 smc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
505 smc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
507 smc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
508 smc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask
[all...] |
| amdgpu_arcturus_ppt.c | 532 struct atom_smc_dpm_info_v4_6 *smc_dpm_table; local in function:arcturus_append_powerplay_table
539 (uint8_t **)&smc_dpm_table);
544 smc_dpm_table->table_header.format_revision,
545 smc_dpm_table->table_header.content_revision);
547 if ((smc_dpm_table->table_header.format_revision == 4) &&
548 (smc_dpm_table->table_header.content_revision == 6))
550 &smc_dpm_table->maxvoltagestepgfx,
551 sizeof(*smc_dpm_table) - offsetof(struct atom_smc_dpm_info_v4_6, maxvoltagestepgfx));
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