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Searched refs:smnPCIE_LC_LINK_WIDTH_CNTL (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
navi10_ppt.h	`55 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288`
amdgpu_vega20_ppt.c	`51 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 1073 lane_width = (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) &`
amdgpu_navi10_ppt.c	`835 lane_width = (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) &`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_hwmgr.c	`63 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 3368 current_lane_width = (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) &`

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