| /src/sys/arch/aarch64/aarch64/ |
| db_disasm.c | 135 strdisasm(vaddr_t pc, uint64_t spsr)
138 if (spsr & SPSR_A32) {
141 const char *arch = (spsr & SPSR_A32_T) ? "T32" : "A32";
143 size = fetch_arm_insn(pc, spsr, &insn);
|
| trap.c | 599 fetch_arm_insn(uint64_t pc, uint64_t spsr, uint32_t *insn)
609 if (spsr & SPSR_A32_T) {
640 arm_cond_match(uint32_t insn, uint64_t spsr)
647 match = spsr & SPSR_Z;
650 match = spsr & SPSR_C;
653 match = spsr & SPSR_N;
656 match = spsr & SPSR_V;
659 match = ((spsr & (SPSR_C | SPSR_Z)) == SPSR_C);
662 match = (!(spsr & SPSR_N) == !(spsr & SPSR_V))
[all...] |
| fault.c | 126 #define IS_SPSR_USER(spsr) \
127 (((spsr) & (SPSR_M & ~SPSR_A32)) == 0)
|
| netbsd32_machdep.c | 402 const uint32_t spsr = mcp->__gregs[_REG_CPSR]; local in function:cpu_mcontext32_validate
406 if (__SHIFTOUT(spsr, SPSR_M) != SPSR_M_USR32)
410 if ((spsr & SPSR_A32_E) == 0)
413 if ((spsr & SPSR_A32_E) != 0)
417 if ((spsr & (SPSR_A|SPSR_I|SPSR_F)) != 0)
|
| /src/sys/arch/arm/xscale/ |
| pxa2x0_apm_asm.S | 165 mrs r2, spsr /* Load SVC saved CPSR. */
171 mrs r2, spsr /* Load FIQ mode saved CPSR. */
176 mrs r0, spsr /* Load IRQ mode saved CPSR. */
181 mrs r0, spsr /* Load ABT mode saved CPSR. */
186 mrs r0, spsr /* Load UND mode saved CPSR. */
326 /* Restore SVC mode SPSR and stack pointer. */
328 msr spsr, r0
335 msr spsr, r0
348 msr spsr, r0
356 msr spsr, r
[all...] |
| /src/sys/arch/arm/arm32/ |
| exception.S | 207 mrs r2, spsr
214 .asciz "Address Exception CPSR=0x%08x SPSR=0x%08x LR=0x%08x\n"
|
| /src/sys/arch/shark/shark/ |
| profile.c | 445 unsigned int spsr, stacklr; /* the link register, off the stack. */ local in function:profFiq
491 /* get the spsr register
493 __asm("mrs %0, spsr" : "=r" (spsr) : );
500 ((spsr & STATUS_MODE_MASK) == USER_MODE) )
510 if ( ((spsr & STATUS_MODE_MASK) == SVC_MODE)/* ||
511 ((spsr & STATUS_MODE_MASK) == IRQ_MODE)*/ )
|
| /src/sys/arch/arm/include/arm32/ |
| frame.h | 184 * When invoked, r0 *must* contain the value of SPSR on the current
330 mrs r0, spsr; /* Get the SPSR */ \
331 str r0, [sp, #-TF_R0]! /* Push the SPSR on the stack */
389 ldr r0, [sp], #TF_R0; /* Pop the SPSR from stack */ \
437 mrs r3, spsr; /* Save xxx32 spsr */ \
456 msr spsr_fsxc, r3; /* Restore correct spsr */ \
461 mrs r0, spsr; /* Get the SPSR */ \
[all...] |
| /src/sys/arch/aarch64/include/ |
| armreg.h | 1098 #define SPSR_USER_P(spsr) (((spsr) & (SPSR_M & ~SPSR_A32)) == 0)
1099 #define SPSR_PRIVILEGED_P(spsr) (!SPSR_USER_P((spsr)))
|
| /src/sys/dev/pci/ |
| pccbb.c | 2266 pcireg_t spsr; local in function:pccbb_pcmcia_socket_enable
2279 spsr =
2282 if (spsr & CB_SOCKET_STAT_5VCARD) {
2285 } else if (spsr & CB_SOCKET_STAT_3VCARD) {
2289 DPRINTF(("?V card, 0x%x\n", spsr)); /* XXX */
|
