| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_rv770_dma.c | 38 * @src_offset: src GPU address
48 uint64_t src_offset, uint64_t dst_offset,
81 radeon_ring_write(ring, src_offset & 0xfffffffc);
83 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff);
84 src_offset += cur_size_in_dw * 4;
|
| radeon_evergreen_dma.c | 103 * @src_offset: src GPU address
113 uint64_t src_offset,
147 radeon_ring_write(ring, src_offset & 0xfffffffc);
149 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff);
150 src_offset += cur_size_in_dw * 4;
|
| radeon_si_dma.c | 227 * @src_offset: src GPU address
237 uint64_t src_offset, uint64_t dst_offset,
270 radeon_ring_write(ring, lower_32_bits(src_offset));
272 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff);
273 src_offset += cur_size_in_bytes;
|
| radeon_evergreen_cs.c | 2833 u64 src_offset, dst_offset, dst2_offset; local in function:evergreen_dma_cs_parse
2898 src_offset = radeon_get_ib_value(p, idx+2);
2899 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;
2902 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2904 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
2923 src_offset = radeon_get_ib_value(p, idx+1);
2924 src_offset <<= 8;
2933 src_offset = radeon_get_ib_value(p, idx+7);
2934 src_offset |= ((u64)(radeon_get_ib_value(p, idx+8) & 0xff)) << 32;
2942 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj))
[all...] |
| radeon_r600_dma.c | 439 * @src_offset: src GPU address
449 uint64_t src_offset, uint64_t dst_offset,
482 radeon_ring_write(ring, src_offset & 0xfffffffc);
484 (upper_32_bits(src_offset) & 0xff)));
485 src_offset += cur_size_in_dw * 4;
|
| radeon_r200.c | 89 uint64_t src_offset,
119 radeon_ring_write(ring, src_offset);
122 src_offset += cur_size;
|
| radeon_asic.h | 88 uint64_t src_offset,
159 uint64_t src_offset,
350 uint64_t src_offset, uint64_t dst_offset,
354 uint64_t src_offset, uint64_t dst_offset,
476 uint64_t src_offset, uint64_t dst_offset,
550 uint64_t src_offset, uint64_t dst_offset,
728 uint64_t src_offset, uint64_t dst_offset,
799 uint64_t src_offset, uint64_t dst_offset,
803 uint64_t src_offset, uint64_t dst_offset,
|
| radeon_r600_cs.c | 2386 u64 src_offset, dst_offset; local in function:r600_dma_cs_parse
2444 src_offset = radeon_get_ib_value(p, idx+1);
2445 src_offset <<= 8;
2454 src_offset = radeon_get_ib_value(p, idx+5);
2455 src_offset |= ((u64)(radeon_get_ib_value(p, idx+6) & 0xff)) << 32;
2466 src_offset = radeon_get_ib_value(p, idx+2);
2467 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;
2477 src_offset = radeon_get_ib_value(p, idx+2);
2478 src_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32;
2489 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj))
[all...] |
| radeon_cik_sdma.c | 575 * @src_offset: src GPU address
585 uint64_t src_offset, uint64_t dst_offset,
619 radeon_ring_write(ring, lower_32_bits(src_offset));
620 radeon_ring_write(ring, upper_32_bits(src_offset));
623 src_offset += cur_size_in_bytes;
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_object_blt.c | 212 u64 src_offset, dst_offset; local in function:intel_emit_vma_copy_blt
238 src_offset = src->node.start;
254 *cmd++ = lower_32_bits(src_offset);
255 *cmd++ = upper_32_bits(src_offset);
265 *cmd++ = lower_32_bits(src_offset);
266 *cmd++ = upper_32_bits(src_offset);
273 *cmd++ = src_offset;
279 src_offset += size;
|
| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_blit.c | 358 * @src_offset: Source copy start offset from start of bo.
363 u32 src_offset,
371 u32 src_page = src_offset >> PAGE_SHIFT;
373 u32 src_page_offset = src_offset & ~PAGE_MASK;
421 src_offset += copy_size;
434 * @src_offset: Source offset of blit start in bytes.
453 u32 src_offset, u32 src_stride,
498 ret = vmw_bo_cpu_blit_line(&d, dst_offset, src_offset, w);
503 src_offset += src_stride;
|
| vmwgfx_stdu.c | 585 u32 src_offset, dst_offset; local in function:vmw_stdu_bo_cpu_commit
604 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
610 swap(src_offset, dst_offset);
614 src_bo, src_offset, src_pitch,
1302 u32 src_offset, dst_offset; local in function:vmw_stdu_bo_populate_update_cpu
1321 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1325 src_offset, src_pitch, width * stdu->cpp, height,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_sdma.h | 91 uint64_t src_offset,
|
| amdgpu_ttm.h | 102 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
|
| amdgpu_sdma_v2_4.c | 1198 * @src_offset: src GPU address
1207 uint64_t src_offset,
1215 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
1216 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);
|
| amdgpu_si_dma.c | 772 * @src_offset: src GPU address
781 uint64_t src_offset,
788 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
790 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset) & 0xff;
|
| amdgpu_cik_sdma.c | 1310 * @src_offset: src GPU address
1319 uint64_t src_offset,
1326 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
1327 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);
|
| amdgpu_sdma_v3_0.c | 1636 * @src_offset: src GPU address
1645 uint64_t src_offset,
1653 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
1654 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);
|
| amdgpu_sdma_v5_0.c | 1656 * @src_offset: src GPU address
1665 uint64_t src_offset,
1673 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
1674 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);
|
| amdgpu_sdma_v4_0.c | 2448 * @src_offset: src GPU address
2457 uint64_t src_offset,
2465 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);
2466 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);
|
| /src/sys/external/bsd/drm2/dist/include/uapi/drm/ |
| qxl_drm.h | 70 * src_offset)
76 __u64 src_offset; /* offset into src_handle or src buffer */ member in struct:drm_qxl_reloc
|
| /src/sys/external/bsd/drm2/dist/drm/qxl/ |
| qxl_ioctl.c | 84 int src_offset; member in struct:qxl_reloc_info
100 info->src_offset);
250 reloc_info[i].src_offset = reloc.src_offset;
253 reloc_info[i].src_offset = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_bo.c | 876 u64 src_offset = mem->vma[0].addr; local in function:nvc0_bo_move_copy
890 OUT_RING (chan, upper_32_bits(src_offset));
891 OUT_RING (chan, lower_32_bits(src_offset));
902 src_offset += (PAGE_SIZE * line_count);
914 u64 src_offset = mem->vma[0].addr; local in function:nvc0_bo_move_m2mf
931 OUT_RING (chan, upper_32_bits(src_offset));
932 OUT_RING (chan, lower_32_bits(src_offset));
941 src_offset += (PAGE_SIZE * line_count);
953 u64 src_offset = mem->vma[0].addr; local in function:nva3_bo_move_copy
967 OUT_RING (chan, upper_32_bits(src_offset));
1044 u64 src_offset = mem->vma[0].addr; local in function:nv50_bo_move_m2mf
1138 u32 src_offset = old_reg->start << PAGE_SHIFT; local in function:nv04_bo_move_m2mf
[all...] |
| /src/sys/arch/amiga/dev/ |
| grf_rt.c | 1303 u_long src_offset, dst_offset;
1321 src_offset = op->src_x + op->src_y * gp->g_display.gd_fbwidth;
1331 if (src_offset < dst_offset)
1334 src_offset += tot;
1338 src_bank_lo = (src_offset >> 6) & 0xff;
1339 src_bank_hi = (src_offset >> 14) & 0xff;
1350 if (src_offset < dst_offset)
|
| /src/sys/external/bsd/drm/dist/shared-core/ |
| r600_cp.c | 2372 u64 src_offset, dst_offset; local in function:r600_cp_dispatch_texture
2420 src_offset = dev_priv->gart_buffers_offset + buf->offset;
2422 r600_blit_copy(dev, src_offset, dst_offset, pass_size);
|
