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    Searched refs:srsrc (Results 1 - 8 of 8) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
SIMCCodeEmitter.cpp 327 int srsrc = AMDGPU::getNamedOperandIdx(MI.getOpcode(), local
328 AMDGPU::OpName::srsrc);
329 assert(vaddr0 >= 0 && srsrc > vaddr0);
330 unsigned NumExtraAddrs = srsrc - vaddr0 - 1;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILoadStoreOptimizer.cpp 87 bool SRsrc = false;
94 // GFX10 image_sample instructions can have 12 vaddrs + srsrc + ssamp.
433 Result.SRsrc = true;
443 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);
448 Result.SRsrc = true;
459 Result.SRsrc = true;
548 if (Regs.SRsrc)
550 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);
1348 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))
1412 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))
    [all...]
SIInstrInfo.cpp 202 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc))
319 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc);
346 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);
4202 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc);
5202 Register SRsrc = MRI.createVirtualRegister(SRsrcRC);
5205 auto Merge = BuildMI(LoopBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), SRsrc);
5213 Rsrc.setReg(SRsrc);
5505 MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc);
5506 if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))
    [all...]
GCNHazardRecognizer.cpp 743 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc);
SIFoldOperands.cpp 652 if (TII->getNamedOperand(*UseMI, AMDGPU::OpName::srsrc)->getReg() !=
SIRegisterInfo.cpp 971 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 591 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3422 int SrsrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);

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