| /src/sys/arch/powerpc/ibm4xx/dev/ |
| rgmii.c | 55 uint32_t ssr; local
60 ssr = bus_space_read_4(sc->sc_iot, sc->sc_rgmiih, RGMII0_SSR);
61 ssr &= ~SSR_SP(instance, SSR_SP_MASK);
62 bus_space_write_4(sc->sc_iot, sc->sc_rgmiih, RGMII0_SSR, ssr);
100 uint32_t ssr; local
104 ssr = bus_space_read_4(sc->sc_iot, sc->sc_rgmiih, RGMII0_SSR);
105 ssr &= ~SSR_SP(instance, SSR_SP_MASK);
108 ssr |= SSR_SP(instance, SSR_SP_1000MBPS);
111 ssr |= SSR_SP(instance, SSR_SP_100MBPS);
114 ssr |= SSR_SP(instance, SSR_SP_10MBPS)
[all...] |
| /src/sys/arch/pmax/tc/ |
| asc_ioasic.c | 198 uint32_t ssr; local
200 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
201 ssr &= ~IOASIC_CSR_DMAEN_SCSI;
202 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
217 uint32_t ssr, scr, *p; local
233 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
234 ssr &= ~IOASIC_CSR_DMAEN_SCSI;
235 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
292 uint32_t ssr; local
294 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR)
313 u_int tcl, tcm, ssr, scr, intr; local
[all...] |
| /src/sys/dev/tc/ |
| bba.c | 241 uint32_t ssr; local
244 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
245 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
247 ssr &= ~IOASIC_CSR_ISDN_ENABLE;
248 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
259 ssr |= IOASIC_CSR_ISDN_ENABLE;
260 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
356 uint32_t ssr; local
361 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
362 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T
382 uint32_t ssr; local
419 uint32_t ssr; local
487 uint32_t ssr; local
[all...] |
| if_le_ioasic.c | 114 uint32_t ssr; local
153 ssr = bus_space_read_4(ioasic_bst, ioasic_bsh, IOASIC_CSR);
154 ssr |= IOASIC_CSR_DMAEN_LANCE;
155 bus_space_write_4(ioasic_bst, ioasic_bsh, IOASIC_CSR, ssr);
|
| /src/sys/dev/mii/ |
| amhphy.c | 181 uint16_t bmsr, bmcr, ssr; local
189 PHY_READ(sc, MII_AMHPHY_SSR, &ssr);
191 if (ssr & SSR_LS)
215 if (ssr & SSR_S) {
224 if (ssr & SSR_FD)
|
| jmphy.c | 124 uint16_t bmcr, ssr; local
168 PHY_READ(sc, JMPHY_SSR, &ssr);
169 if (ssr & JMPHY_SSR_LINK_UP) {
197 uint16_t bmcr, ssr, gtsr; local
204 PHY_READ(sc, JMPHY_SSR, &ssr);
205 if ((ssr & JMPHY_SSR_LINK_UP) != 0)
218 if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
224 switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
247 if ((ssr & JMPHY_SSR_DUPLEX) != 0)
|
| rgephy.c | 346 uint16_t gstat, bmsr, bmcr, gtsr, physr, ssr; local
398 PHY_READ(sc, RGEPHY_MII_SSR, &ssr);
399 switch (ssr & RGEPHY_SSR_SPD_MASK) {
413 if (ssr & RGEPHY_SSR_FDX)
624 uint16_t ssr, phycr1; local
636 PHY_READ(sc, RGEPHY_MII_SSR, &ssr);
637 if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
638 ssr &= ~RGEPHY_SSR_ALDPS;
639 PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
|
| atphy.c | 344 uint16_t bmsr, bmcr, gsr, ssr; local
366 PHY_READ(sc, ATPHY_SSR, &ssr);
367 if (!(ssr & ATPHY_SSR_SPD_DPLX_RESOLVED)) {
373 switch (ssr & ATPHY_SSR_SPEED_MASK) {
396 if (ssr & ATPHY_SSR_DUPLEX)
|
| /src/external/gpl3/gdb.old/dist/sim/sh/ |
| sh-sim.h | 66 int ssr; member in struct:__anon22708::__anon22709::__anon22712::__anon22713
|
| /src/external/gpl3/gdb/dist/sim/sh/ |
| sh-sim.h | 66 int ssr; member in struct:__anon2097::__anon2098::__anon2101::__anon2102
|
| /src/sys/arch/landisk/landisk/ |
| intr.c | 74 intc_intr(int ssr, int spc, int ssp)
99 ssr &= 0xf0;
100 if (level < ssr)
101 level = ssr;
116 cf.ssr = ssr;
|
| /src/sys/arch/dreamcast/dreamcast/ |
| machdep.c | 264 intc_intr(int ssr, int spc, int ssp)
284 cf.ssr = ssr;
|
| /src/sys/arch/sh3/include/ |
| cpu.h | 83 int ssr; /* status register at time of interrupt */ member in struct:clockframe
88 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr))
|
| locore.h | 76 stc ssr, r2 /* r2 = SSR */ ;\
81 tst r3, r2 /* if (SSR.MD == 0) T = 1 */ ;\
139 ldc.l @r14+, ssr /* tf_ssr */ ;\
|
| /src/sys/arch/alpha/tc/ |
| ioasic.c | 152 u_long ssr; local
173 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
174 ssr |= IOASIC_CSR_FASTMODE;
175 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
| /src/sys/arch/evbsh3/evbsh3/ |
| machdep.c | 530 intc_intr(int ssr, int spc, int ssp)
579 cf.ssr = ssr;
|
| /src/sys/arch/sh3/dev/ |
| sci.c | 908 u_char ssr; local
924 ssr = get[1];
925 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
926 if (ISSET(ssr, SCSSR_FER))
928 if (ISSET(ssr, SCSSR_PER))
1068 u_short ssr; local
1078 ssr = SHREG_SCSSR;
1079 if (ISSET(ssr, SCSSR_FER)) {
|
| /src/external/gpl3/binutils/dist/include/opcode/ |
| tic6x-control-registers.h | 50 CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
|
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| tic6x-control-registers.h | 50 CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
|
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| tic6x-control-registers.h | 50 CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
|
| /src/external/gpl3/gdb/dist/include/opcode/ |
| tic6x-control-registers.h | 50 CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
|
| /src/sys/arch/hpcsh/hpcsh/ |
| machdep.c | 588 intc_intr(int ssr, int spc, int ssp)
613 cf.ssr = ssr;
|
| /src/sys/dev/sdmmc/ |
| sdmmc_mem.c | 947 if (sf->ssr.cache && sf->ext_sd.pef.valid) {
1364 sdmmc_bitfield512_t *ssr)
1413 memcpy(ssr, ptr, datalen);
1432 sdmmc_be512_to_bitfield512(ssr);
1436 sdmmc_dump_data("SSR", ssr, datalen);
1445 uint32_t *ssr = (uint32_t *)ssr_bitfield; local
1448 const int bus_width = SSR_DAT_BUS_WIDTH(ssr);
1449 const int speed_class = SSR_SPEED_CLASS(ssr);
1450 const int uhs_speed_grade = SSR_UHS_SPEED_GRADE(ssr);
[all...] |
| /src/sys/arch/mmeye/mmeye/ |
| machdep.c | 648 intc_intr(int ssr, int spc, int ssp)
670 cf.ssr = ssr;
|
| /src/sys/arch/sh3/sh3/ |
| exception_vector.S | 485 stc ssr, r4
496 jsr @r0 ! intc_intr(ssr, spc, ssp)
|
