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    Searched refs:stat_regs (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rs600.c 743 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS);
744 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
748 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
752 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
757 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
763 rdev->irq.stat_regs.r500.disp_int = 0;
767 rdev->irq.stat_regs.r500.hdmi0_status = RREG32(R_007404_HDMI0_STATUS) &
769 if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) {
775 rdev->irq.stat_regs.r500.hdmi0_status = 0;
803 !rdev->irq.stat_regs.r500.disp_int &
    [all...]
radeon_r600.c 3953 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS);
3954 rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE);
3955 rdev->irq.stat_regs.r600.disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2);
3957 rdev->irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0);
3958 rdev->irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1);
3960 rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS);
3961 rdev->irq.stat_regs.r600.hdmi1_status = RREG32(DCE3_HDMI1_STATUS);
3964 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS);
3965 rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE);
3966 rdev->irq.stat_regs.r600.disp_int_cont2 = 0
    [all...]
radeon_cik.c 7317 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS);
7318 rdev->irq.stat_regs.cik.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE);
7319 rdev->irq.stat_regs.cik.disp_int_cont2 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE2);
7320 rdev->irq.stat_regs.cik.disp_int_cont3 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE3);
7321 rdev->irq.stat_regs.cik.disp_int_cont4 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE4);
7322 rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5);
7323 rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6);
7325 rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS +
7327 rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS +
7330 rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS
    [all...]
radeon_evergreen.c 4620 u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int;
4621 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
4622 u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status;
4708 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
4709 u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status;
radeon_si.c 6155 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
6156 u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int;
6254 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
radeon.h 848 union radeon_irq_stat_regs stat_regs; member in struct:radeon_irq

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