| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sw/ |
| chan.h | 24 bool (*mthd)(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
30 bool nvkm_sw_chan_mthd(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
|
| nouveau_nvkm_engine_sw_chan.c | 38 nvkm_sw_chan_mthd(struct nvkm_sw_chan *chan, int subc, u32 mthd, u32 data)
48 return chan->func->mthd(chan, subc, mthd, data);
|
| nouveau_nvkm_engine_sw_base.c | 35 nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)
44 handled = nvkm_sw_chan_mthd(chan, subc, mthd, data);
|
| nouveau_nvkm_engine_sw_nv04.c | 93 nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
|
| nouveau_nvkm_engine_sw_gf100.c | 62 gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
|
| nouveau_nvkm_engine_sw_nv50.c | 67 nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_dma.h | 111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)
113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);
117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)
119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);
123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)
125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));
129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)
131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));
135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)
137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2))
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/engine/ |
| sw.h | 15 bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sec/ |
| nouveau_nvkm_engine_sec_g98.c | 55 u32 subc = (addr & 0x3800) >> 11; local
61 "subc %d mthd %04x data %08x\n", ssta,
65 subc, mthd, data);
|
| /src/sys/lib/libkern/arch/sh3/ |
| sdivsi3.S | 75 subc r3, r3
76 subc r2, r0
|
| sdivsi3_i4i.S | 86 subc r3, r3
87 subc r2, r0
|
| ashiftrt.S | 71 subc r4, r4
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/rl78/ |
| subdi3.S | 37 subc a, [hl+14] ; SUBC insns which both account for and update the carry bit
40 subc a, [hl+15]
44 subc a, [hl+16]
47 subc a, [hl+17]
|
| /src/external/gpl3/gcc/dist/libgcc/config/rl78/ |
| subdi3.S | 37 subc a, [hl+14] ; SUBC insns which both account for and update the carry bit
40 subc a, [hl+15]
44 subc a, [hl+16]
47 subc a, [hl+17]
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/ce/ |
| nouveau_nvkm_engine_ce_gt215.c | 56 u32 subc = (addr & 0x3800) >> 11; local
62 "subc %d mthd %04x data %08x\n", ssta,
66 subc, mthd, data);
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/c6x/ |
| lib1funcs.S | 149 ;; We use a series of up to 31 subc instructions. First, we find
152 ;; to the, and the number of times we have to execute subc.
185 || [b1] subc .l1x A4,B4,A4
187 [b1] subc .l1x A4,B4,A4
193 || [b1] subc .l1x A4,B4,A4
195 [b1] subc .l1x A4,B4,A4
198 [b1] subc .l1x A4,B4,A4
200 [b1] subc .l1x A4,B4,A4
202 [b1] subc .l1x A4,B4,A4
204 [b1] subc .l1x A4,B4,A
[all...] |
| /src/external/gpl3/gcc/dist/libgcc/config/c6x/ |
| lib1funcs.S | 149 ;; We use a series of up to 31 subc instructions. First, we find
152 ;; to the, and the number of times we have to execute subc.
185 || [b1] subc .l1x A4,B4,A4
187 [b1] subc .l1x A4,B4,A4
193 || [b1] subc .l1x A4,B4,A4
195 [b1] subc .l1x A4,B4,A4
198 [b1] subc .l1x A4,B4,A4
200 [b1] subc .l1x A4,B4,A4
202 [b1] subc .l1x A4,B4,A4
204 [b1] subc .l1x A4,B4,A
[all...] |
| /src/external/lgpl3/gmp/dist/mpn/sparc64/ |
| sec_tabselect.asm | 86 subc %g0, %g0, mask
125 subc %g0, %g0, mask
151 subc %g0, %g0, mask
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| nouveau_nvkm_engine_fifo_nv04.c | 116 const int subc = (addr & 0x0000e000) >> 13; local
118 const u32 mask = 0x0000000f << (subc * 4);
132 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data);
171 "ch %d [%s] subc %d mthd %04x data %08x\n",
|
| /src/sys/external/bsd/drm2/dist/drm/i2c/ |
| ch7006_mode.c | 111 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
133 .subc_coeff = subc * fixed1, \
141 subc, scale, scale_mask, norm_mask) \
142 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
|
| /src/external/lgpl3/gmp/dist/mpn/sh/sh2/ |
| submul_1.asm | 56 subc r1,r3
|
| /src/external/lgpl3/gmp/dist/mpn/sh/ |
| sub_n.asm | 50 subc r2,r1
|
| /src/external/lgpl3/gmp/dist/mpn/sparc64/ultrasparct1/ |
| rsblshC_n.asm | 68 subc %g5, %g0, %o0
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nouveau_nvkm_engine_gr_nv50.c | 428 u32 subc = (addr & 0x00070000) >> 16; local
438 "ch %d [%010"PRIx64" %s] subc %d "
441 chid, inst, name, subc, class, mthd,
456 u32 subc = (addr & 0x00070000) >> 16; local
464 "ch %d [%010"PRIx64" %s] subc %d "
467 subc, class, mthd, data, addr);
634 u32 subc = (addr & 0x00070000) >> 16; local
671 nvkm_error(subdev, "%08x [%s] ch %d [%010"PRIx64" %s] subc %d "
674 subc, class, mthd, data);
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| rl78-decode.opc | 1156 /** 0011 1111 subc %0, %e!1 */
1157 ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1159 /** 0011 1101 subc %0, %e1 */
1160 ID(subc); DR(A); SM(HL, 0); Fzac;
1162 /** 0110 0001 1011 0000 subc %0, %e1 */
1163 ID(subc); DR(A); SM2(HL, B, 0); Fzac;
1165 /** 0110 0001 1011 0010 subc %0, %e1 */
1166 ID(subc); DR(A); SM2(HL, C, 0); Fzac;
1168 /** 0011 1110 subc %0, %ea1 */
1169 ID(subc); DR(A); SM(HL, IMMU(1)); Fzac
[all...] |
