| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sw/ |
| chan.h | 24 bool (*mthd)(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
30 bool nvkm_sw_chan_mthd(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
|
| nouveau_nvkm_engine_sw_chan.c | 38 nvkm_sw_chan_mthd(struct nvkm_sw_chan *chan, int subc, u32 mthd, u32 data)
48 return chan->func->mthd(chan, subc, mthd, data);
|
| nouveau_nvkm_engine_sw_base.c | 35 nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)
44 handled = nvkm_sw_chan_mthd(chan, subc, mthd, data);
|
| nouveau_nvkm_engine_sw_nv04.c | 93 nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
|
| nouveau_nvkm_engine_sw_gf100.c | 62 gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
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| nouveau_nvkm_engine_sw_nv50.c | 67 nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_dma.h | 111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)
113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);
117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)
119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);
123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)
125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));
129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)
131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));
135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)
137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2))
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/engine/ |
| sw.h | 15 bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sec/ |
| nouveau_nvkm_engine_sec_g98.c | 55 u32 subc = (addr & 0x3800) >> 11; local in function:g98_sec_intr
61 "subc %d mthd %04x data %08x\n", ssta,
65 subc, mthd, data);
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| /src/sys/lib/libkern/arch/sh3/ |
| sdivsi3.S | 75 subc r3, r3
76 subc r2, r0
|
| sdivsi3_i4i.S | 86 subc r3, r3
87 subc r2, r0
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| ashiftrt.S | 71 subc r4, r4
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/ce/ |
| nouveau_nvkm_engine_ce_gt215.c | 56 u32 subc = (addr & 0x3800) >> 11; local in function:gt215_ce_intr
62 "subc %d mthd %04x data %08x\n", ssta,
66 subc, mthd, data);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| nouveau_nvkm_engine_fifo_nv04.c | 116 const int subc = (addr & 0x0000e000) >> 13; local in function:nv04_fifo_swmthd
118 const u32 mask = 0x0000000f << (subc * 4);
132 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data);
171 "ch %d [%s] subc %d mthd %04x data %08x\n",
|
| nouveau_nvkm_engine_fifo_gf100.c | 442 u32 subc = (addr & 0x00070000) >> 16; local in function:gf100_fifo_intr_pbdma
451 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data))
460 "subc %d mthd %04x data %08x\n",
463 subc, mthd, data);
|
| nouveau_nvkm_engine_fifo_gk104.c | 698 u32 subc = (addr & 0x00070000) >> 16; local in function:gk104_fifo_intr_pbdma_0
707 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data))
718 "subc %d mthd %04x data %08x\n",
721 subc, mthd, data);
|
| /src/sys/external/bsd/drm2/dist/drm/i2c/ |
| ch7006_mode.c | 111 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
133 .subc_coeff = subc * fixed1, \
141 subc, scale, scale_mask, norm_mask) \
142 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nouveau_nvkm_engine_gr_nv50.c | 428 u32 subc = (addr & 0x00070000) >> 16; local in function:nv50_gr_trap_handler
438 "ch %d [%010"PRIx64" %s] subc %d "
441 chid, inst, name, subc, class, mthd,
456 u32 subc = (addr & 0x00070000) >> 16; local in function:nv50_gr_trap_handler
464 "ch %d [%010"PRIx64" %s] subc %d "
467 subc, class, mthd, data, addr);
634 u32 subc = (addr & 0x00070000) >> 16; local in function:nv50_gr_intr
671 nvkm_error(subdev, "%08x [%s] ch %d [%010"PRIx64" %s] subc %d "
674 subc, class, mthd, data);
|
| nouveau_nvkm_engine_gr_nv20.c | 196 u32 subc = (addr & 0x00070000) >> 16; local in function:nv20_gr_intr
199 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xfff;
214 "nstatus %08x [%s] ch %d [%s] subc %d "
218 subc, class, mthd, data);
|
| nouveau_nvkm_engine_gr_nv40.c | 248 u32 subc = (addr & 0x00070000) >> 16; local in function:nv40_gr_intr
251 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xffff;
280 "nstatus %08x [%s] ch %d [%08x %s] subc %d "
285 subc, class, mthd, data);
|
| nouveau_nvkm_engine_gr_nv04.c | 452 int subc = (nvkm_rd32(device, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7; local in function:nv04_gr_set_ctx1
461 nvkm_wr32(device, NV04_PGRAPH_CTX_CACHE1 + (subc << 2), tmp);
1287 u32 subc = (addr & 0x0000e000) >> 13; local in function:nv04_gr_intr
1290 u32 class = nvkm_rd32(device, 0x400180 + subc * 4) & 0xff;
1322 "nstatus %08x [%s] ch %d [%s] subc %d "
1326 subc, class, mthd, data);
|
| nouveau_nvkm_engine_gr_gf100.c | 1524 u32 subc = (addr & 0x00070000) >> 16; local in function:gf100_gr_ctxctl_isr
1528 nvkm_error(subdev, "FECS MTHD subc %d class %04x "
1530 subc, class, mthd, data);
1564 u32 subc = (addr & 0x00070000) >> 16; local in function:gf100_gr_intr
1577 if (device->card_type < NV_E0 || subc < 4)
1578 class = nvkm_rd32(device, 0x404200 + (subc * 4));
1594 "subc %d class %04x mthd %04x data %08x\n",
1595 chid, inst << 12, name, subc,
1604 "subc %d class %04x mthd %04x data %08x\n",
1605 chid, inst << 12, name, subc, class, mthd, data)
[all...] |
| nouveau_nvkm_engine_gr_nv10.c | 1096 u32 subc = (addr & 0x00070000) >> 16; local in function:nv10_gr_intr
1099 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xfff;
1130 "nstatus %08x [%s] ch %d [%s] subc %d "
1134 subc, class, mthd, data);
|
| /src/lib/libm/noieee_src/ |
| n_support.c | 440 * subc(t) ...perform t=t-1 regarding t as a 64 bit unsigned integer
451 double y,z,t,addc(),subc()
510 if(j==0) { if(t==y) goto end; else t=subc(t); } /* ...t=t-ulp */
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