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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
mcif_wb.h 51 unsigned int sw_int_en; member in struct:mcif_irq_params
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_mmhubbub.c 65 * unsigned int sw_int_en; // Software interrupt enable, frame end and overflow
218 REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_SW_INT_EN, params->sw_int_en);

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