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  /src/common/lib/libc/arch/alpha/string/
bcopy.S 92 ldq_u t3,0(DSTREG)
95 mskql t3,SRCREG,t3
96 or t2,t3,t2
123 ldq_u t3,0(DSTREG)
124 mskqh t3,SIZEREG,t3
125 or t4,t3,t4
142 ldq_u t3,7(SRCREG)
144 extqh t3,SRCREG,t
    [all...]
bzero.S 34 bic a1,63,t3 /* t3 is # bytes to do 64 bytes at a time */
64 bic a1,63,t3 /* recalc t3 (# bytes to do 64 bytes at a
71 beq t3,bzero_lp_done
77 subq t3,64,t3
83 bne t3,bzero_lp
ffs.S 57 zapnot t1, 0x03, t3
58 bne t3, Ldo16
  /src/tests/usr.bin/indent/
lsym_type.c 29 const t3 *const_no_init_ptr;
  /src/lib/libc/arch/mips/gen/
ldexp.S 66 mfc1 t3, $f12 # get LSW of x
77 mtc1 t3, $f0 # save LSW of result
84 beq t3, zero, 9f # result is zero
87 * Find out how many leading zero bits are in t2,t3 and put in t9.
92 move v0, t3
119 * Now shift t2,t3 the correct number of bits.
129 sll t2, t3, t9
130 move t3, zero
135 srl ta0, t3, v0
137 sll t3, t3, t
    [all...]
swapcontext.S 58 /* PIC_PROLOGUE saved gp in t3 */
59 REG_S t3, _UC_GREGS_GP(v1)
70 SETUP_GP64(t3,swapcontext);
_resumecontext.S 62 .cpsetup ra, t3, __resumecontext
73 REG_S t3, _UC_GREGS_GP(a0)
  /src/sys/arch/hppa/hppa/
trap.S 181 GET_CURLWP_SPACE(%sr1, %t3)
182 ldw L_PCB(%sr1, %t3), %t2 /* XXX can use ,sl */
191 ldo NBPG+TRAPFRAME_SIZEOF(%t2), %t3 /* see cpu_lwp_fork */
193 stw %t4, TF_R19-TRAPFRAME_SIZEOF(%sr1, %t3) /* t4 for vfork */
194 stw %t1, TF_R22-TRAPFRAME_SIZEOF(%sr1, %t3) /* syscall # */
198 stw %arg3, TF_R23 -TRAPFRAME_SIZEOF(%sr1, %t3)
199 stw %arg2, TF_R24 -TRAPFRAME_SIZEOF(%sr1, %t3)
200 stw %arg1, TF_R25 -TRAPFRAME_SIZEOF(%sr1, %t3)
201 stw %arg0, TF_R26 -TRAPFRAME_SIZEOF(%sr1, %t3)
202 stw %r27, TF_R27 -TRAPFRAME_SIZEOF(%sr1, %t3) /* dp *
    [all...]
locore.S 204 * Put page aligned %arg3 into %t3. It is the start of available
207 ldo NBPG-1(%arg3), %t3
208 dep %r0, 31, PGSHIFT, %t3
214 stw %t3, R%(n)(%t1) ! \
215 add %t3, %t2, %t3
221 copy %t3, %t2
231 ldo NBPG+TRAPFRAME_SIZEOF(%t3), %sp
232 mtctl %t3, CR_FPPADDR
235 stw %r0, PCB_ONFAULT(%t3)
    [all...]
lock_stubs.S 84 ldo (MTX_LOCK + HPPA_LDCW_ALIGN - 1)(%arg0), %t3
85 depi 0, 31, 4, %t3 /* bits[28-31] = 0 */
87 stw %t2, 0(%t3) /* %t3 is properly aligned */
253 copy %ret0, %t3
254 depi 0, 31, 4, %t3
256 /* %t3 is the interlock address */
257 ldcw 0(%t3), %ret0
260 ldw 0(%t3), %ret0
263 ldcw 0(%t3), %ret
    [all...]
  /src/common/lib/libc/arch/alpha/gen/
byte_swap_4.S 48 extbl a0, 3, t3 /* t3 = 0x 01 */
51 or t3, t0, v0 /* v0 = 0x67 01 */
  /src/common/lib/libc/arch/mips/string/
bcopy.S 125 REG_L t3,(0*SZREG)(SRCREG)
130 REG_S t3,(0*SZREG)(DSTREG)
137 REG_L t3,(-4*SZREG)(SRCREG)
143 REG_S t3,(-4*SZREG)(DSTREG)
155 REG_L t3,0(SRCREG)
157 REG_S t3,0(DSTREG)
165 lb t3,0(SRCREG)
167 sb t3,0(DSTREG)
190 REG_LHI t3,0(SRCREG)
191 REG_LLO t3,SZREG-1(SRCREG
    [all...]
  /src/bin/sh/USD.doc/
Makefile 6 SRCS= referargs t.mac t1 t2 t3 t4
  /src/lib/libc/arch/mips/sys/
cerror.S 53 PIC_PROLOGUE(__cerror) # saves caller gp in t3 (n32/n64)
58 PTR_S t3, CALLFRAME_GP(sp) # save caller gp (in t3)
78 # on the stack and not in the t3 reg (for the n32/n64 case).
getcontext.S 52 /* PIC_PROLOGUE saved gp in t3 */
53 REG_S t3, _UC_GREGS_GP(a0)
  /src/lib/csu/arch/mips/
crt0.S 53 SETUP_GP64(t3, __start)
  /src/sys/arch/mips/include/
regdef.h 59 #define t3 $15 macro
64 #define t3 $11 macro
93 * should be used only when we need more than t0-t3.
  /src/sys/dev/acpi/
acpi_timer.c 143 uint32_t t1, t2, t3; local in function:acpitimer_read_safe
146 (void)AcpiGetTimer(&t3);
150 t2 = t3;
152 (void)AcpiGetTimer(&t3);
154 } while ((t1 > t2) || (t2 > t3));
  /src/sys/dev/ic/
acpipmtimer.c 79 uint32_t t1, t2, t3; local in function:acpihwtimer_read_safe
82 t3 = r(h);
85 t2 = t3;
86 t3 = r(h);
87 } while ((t1 > t2) || (t2 > t3));
  /src/sys/dev/tc/
if_le_ioasic.c 283 uint32_t t1, t2, t3, t4; local in function:le_ioasic_copytobuf_gap16
289 t3 = *(uint32_t *)(from + 10);
295 dst[2] = (t2 >> 16) | (t3 << 16);
296 dst[3] = (t3 >> 16) | (t4 << 16);
308 uint32_t t0, t1, t2, t3; local in function:le_ioasic_copytobuf_gap16
310 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3];
311 dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3;
362 uint32_t t0, t1, t2, t3; local in function:le_ioasic_copyfrombuf_gap16
365 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3];
371 *(uint32_t *)(to + 10) = (t2 >> 16) | (t3 << 16)
383 uint32_t t0, t1, t2, t3; local in function:le_ioasic_copyfrombuf_gap16
    [all...]
  /src/sys/arch/playstation2/playstation2/
locore_machdep.S 70 lw t3, _C_LABEL(md_imask)
74 nor ta0, zero, t3
76 and t3, t3, t0
77 or t0, t3, ta0
78 and t3, t0, a0 /* INTC */
80 sw t3, 0(a1)
138 2: lw t3, 0(t0) # copy
139 sw t3, 0(ta0)
  /src/sys/arch/mips/mips/
fp.S 1002 bne t3, zero, result_fs_d
1011 beq t3, zero, 3f
1066 move t3, zero
1080 sltu t9, zero, t3 # dont lose any one bits
1082 srl t3, t2, v1 # shift FSs fraction
1087 sll t9, t3, v0 # save bits shifted out
1088 srl t3, t3, v1 # shift FSs fraction
1090 or t3, t3, v0 # and put into t
    [all...]
  /src/sys/arch/newsmips/stand/boot/
locore.S 50 lw t3, 0(t0)
52 sw t3, 0(t1)
  /src/sys/crypto/aes/
aes_bear.c 345 aesbear_xts_update(uint32_t *t0, uint32_t *t1, uint32_t *t2, uint32_t *t3)
352 s3 = *t3 >> 31;
356 *t3 = (*t3 << 1) ^ s2;
373 uint32_t t0, t1, t2, t3; local in function:aesbear_xts_update_selftest
379 t3 = cases[i].in[3];
380 aesbear_xts_update(&t0, &t1, &t2, &t3);
384 t3 != cases[i].out[3])
399 uint32_t t0, t1, t2, t3, u0, u1, u2, u3; local in function:aesbear_xts_enc
414 t3 = le32dec(tweak + 4*3)
503 uint32_t t0, t1, t2, t3, u0, u1, u2, u3; local in function:aesbear_xts_dec
    [all...]
  /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/ed25519/ref10/fe_51/
fe.h 105 uint64_t t0, t1, t2, t3; local in function:fe25519_tobytes
111 t3 = (t[3] >> 39) | (t[4] << 12);
115 STORE64_LE(s + 24, t3);

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