| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_smu10_smumgr.c | 122 uint8_t *table, int16_t table_id)
128 PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
130 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,
132 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,
136 upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));
139 lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));
142 priv->smu_tables.entry[table_id].table_id);
147 memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,
148 priv->smu_tables.entry[table_id].size)
[all...] |
| smu10_smumgr.h | 37 uint32_t table_id; member in struct:smu_table_entry
|
| amdgpu_vega10_smumgr.c | 44 uint8_t *table, int16_t table_id)
49 PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
51 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,
53 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,
57 upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));
60 lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));
63 priv->smu_tables.entry[table_id].table_id);
68 memcpy(table, priv->smu_tables.entry[table_id].table,
69 priv->smu_tables.entry[table_id].size)
[all...] |
| vega10_smumgr.h | 33 uint32_t table_id; member in struct:smu_table_entry
|
| amdgpu_vega12_smumgr.c | 43 * @param table_id the driver's table ID to copy from
46 uint8_t *table, int16_t table_id)
52 PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
54 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,
56 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,
60 upper_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,
64 lower_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,
69 table_id) == 0,
76 memcpy(table, priv->smu_tables.entry[table_id].table,
77 priv->smu_tables.entry[table_id].size)
[all...] |
| amdgpu_vega20_smumgr.c | 164 * @param table_id the driver's table ID to copy from
167 uint8_t *table, int16_t table_id)
174 PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
176 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].version != 0,
178 PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,
183 upper_32_bits(priv->smu_tables.entry[table_id].mc_addr))) == 0,
188 lower_32_bits(priv->smu_tables.entry[table_id].mc_addr))) == 0,
192 PPSMC_MSG_TransferTableSmu2Dram, table_id)) == 0,
199 memcpy(table, priv->smu_tables.entry[table_id].table,
200 priv->smu_tables.entry[table_id].size)
[all...] |
| amdgpu_smumgr.c | 218 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
221 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
|
| /src/sys/dev/sysmon/ |
| sysmon_envsys_tables.c | 116 sme_find_table(enum sme_descr_type table_id)
118 switch (table_id) {
143 sme_find_table_entry(enum sme_descr_type table_id, int key)
145 const struct sme_descr_entry *table = sme_find_table(table_id);
156 sme_find_table_desc(enum sme_descr_type table_id, const char *str)
158 const struct sme_descr_entry *table = sme_find_table(table_id);
|
| /src/sys/dev/dm/ |
| dm_table.c | 62 * of table_id table.
67 dm_table_busy(dm_table_head_t *head, uint8_t table_id)
73 if (table_id == DM_TABLE_ACTIVE)
105 dm_table_get_entry(dm_table_head_t *head, uint8_t table_id)
109 id = dm_table_busy(head, table_id);
117 dm_table_release(dm_table_head_t *head, uint8_t table_id)
147 dm_table_destroy(dm_table_head_t *head, uint8_t table_id)
155 aprint_debug("dm_Table_destroy called with %d--%d\n", table_id, head->io_cnt);
160 if (table_id == DM_TABLE_ACTIVE)
281 dm_table_get_target_count(dm_table_head_t *head, uint8_t table_id)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| smumgr.h | 117 extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
|
| amdgpu_smu.h | 172 #define SMU_TABLE_INIT(tables, table_id, s, a, d) \
174 tables[table_id].size = s; \
175 tables[table_id].align = a; \
176 tables[table_id].domain = d; \
269 * And the table_id for SMU_MSG_TransferTableSmu2Dram/
|
| hwmgr.h | 233 int (*smc_table_manager)(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); /*rw: true for read, false for write */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| discovery.h | 118 uint32_t table_id; /* table ID */ member in struct:gpu_info_header
|
| /src/sys/dev/pci/ |
| twe.c | 1064 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id,
1070 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp);
1079 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id,
1085 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp);
1094 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id,
1100 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp);
1119 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size,
1147 tp->tp_table_id = htole16(table_id);
1187 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size,
1210 tp->tp_table_id = htole16(table_id);
[all...] |
| twareg.h | 508 uint16_t table_id; member in struct:twa_param_9k
|
| twa.c | 2304 * table_id -- parameter table #
2314 twa_get_param(struct twa_softc *sc, int table_id, int param_id,
2355 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2390 * table_id -- parameter table #
2400 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size,
2436 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_smu.c | 531 int table_id = smu_table_get_index(smu, table_index); local in function:smu_update_table
535 if (!table_data || table_id >= SMU_TABLE_COUNT || table_id < 0)
552 table_id | ((argument & 0xFFFF) << 16));
|
