| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_opp_csc_v.c | 115 const struct out_csc_color_matrix *tbl_entry,
137 tbl_entry->regval[0],
143 tbl_entry->regval[1],
155 tbl_entry->regval[2],
161 tbl_entry->regval[3],
173 tbl_entry->regval[4],
179 tbl_entry->regval[5],
191 tbl_entry->regval[6],
197 tbl_entry->regval[7],
209 tbl_entry->regval[8]
[all...] |
| dce110_transform_v.h | 45 const struct out_csc_color_matrix *tbl_entry);
|
| amdgpu_dce110_hw_sequencer.c | 2463 struct out_csc_color_matrix tbl_entry; local in function:dce110_program_front_end_for_pipe
2468 memset(&tbl_entry, 0, sizeof(tbl_entry));
2478 tbl_entry.color_space =
2482 tbl_entry.regval[i] =
2486 (pipe_ctx->plane_res.xfm, &tbl_entry);
2661 struct out_csc_color_matrix tbl_entry; local in function:program_output_csc
2667 tbl_entry.regval[i] = pipe_ctx->stream->csc_color_matrix.matrix[i];
2669 tbl_entry.color_space = color_space;
2672 pipe_ctx->plane_res.xfm, &tbl_entry);
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_transform.c | 968 const struct out_csc_color_matrix *tbl_entry,
973 OUTPUT_CSC_C11, tbl_entry->regval[0],
974 OUTPUT_CSC_C12, tbl_entry->regval[1]);
978 OUTPUT_CSC_C11, tbl_entry->regval[2],
979 OUTPUT_CSC_C12, tbl_entry->regval[3]);
983 OUTPUT_CSC_C11, tbl_entry->regval[4],
984 OUTPUT_CSC_C12, tbl_entry->regval[5]);
988 OUTPUT_CSC_C11, tbl_entry->regval[6],
989 OUTPUT_CSC_C12, tbl_entry->regval[7]);
993 OUTPUT_CSC_C11, tbl_entry->regval[8]
[all...] |
| dce_transform.h | 501 const struct out_csc_color_matrix *tbl_entry);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_dpp.c | 309 struct out_csc_color_matrix tbl_entry; local in function:dpp1_cnv_setup
407 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i];
409 tbl_entry.color_space = color_space;
416 dpp1_program_input_csc(dpp_base, color_space, select, &tbl_entry);
|
| amdgpu_dcn10_dpp_cm.c | 429 const struct out_csc_color_matrix *tbl_entry)
444 if (tbl_entry == NULL) {
456 regval = tbl_entry->regval;
|
| dcn10_dpp.h | 1423 const struct out_csc_color_matrix *tbl_entry);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_dpp.c | 114 struct out_csc_color_matrix tbl_entry; local in function:dpp2_cnv_setup
230 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i];
232 tbl_entry.color_space = input_color_space;
239 dpp2_program_input_csc(dpp_base, color_space, select, &tbl_entry);
|
| amdgpu_dcn20_dpp_cm.c | 246 const struct out_csc_color_matrix *tbl_entry)
261 if (tbl_entry == NULL) {
273 regval = tbl_entry->regval;
|
| dcn20_dpp.h | 732 const struct out_csc_color_matrix *tbl_entry);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| transform.h | 212 const struct out_csc_color_matrix *tbl_entry);
|
